ea8cfdb5d1
Add fields allowing the PCIe link speed and width of a PCIESlot to be configured, with an instance_post_init callback on the root port parent class to set defaults. This allows child classes to set these via properties or via their own instance_init callback, without requiring all implementions to support arbitrary user selected values. Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Tested-by: Geoffrey McRae <geoff@hostfission.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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.. | ||
msi.h | ||
msix.h | ||
pci_bridge.h | ||
pci_bus.h | ||
pci_host.h | ||
pci_ids.h | ||
pci_regs.h | ||
pci.h | ||
pcie_aer.h | ||
pcie_host.h | ||
pcie_port.h | ||
pcie_regs.h | ||
pcie.h | ||
shpc.h | ||
slotid_cap.h |