Alexander Graf ea71258da4 PPC: Properly emulate L1CSR0 and L1CSR1 ...

There are 2 L1 cache control registers - one for data (L1CSR0) and
one for instructions (L1CSR1).

Emulate both of them well enough to give the guest the illusion that
it could actually do anything about its caches.

Signed-off-by: Alexander Graf <agraf@suse.de>

2014-06-16 13:24:35 +02:00

..

arch_dump.c

target-ppc: Add missing 'static' and 'const' attributes

2014-03-19 18:35:52 +01:00

cpu-models.c

PPC: Make all e500 CPUs SVR aware

2014-06-16 13:24:34 +02:00

cpu-models.h

target-ppc: Remove redundant POWER7 declarations

2014-06-16 13:24:27 +02:00

cpu-qom.h

target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook

2014-03-13 19:20:48 +01:00

cpu.h

PPC: Properly emulate L1CSR0 and L1CSR1

2014-06-16 13:24:35 +02:00

dfp_helper.c

target-ppc: Introduce DFP Shift Significand

2014-06-16 13:24:32 +02:00

excp_helper.c

softmmu: introduce cpu_ldst.h

2014-06-05 16:10:33 +02:00

fpu_helper.c

tcg: Invert the inclusion of helper.h

2014-05-28 09:33:54 -07:00

gdbstub.c

target-ppc: gdbstub allow byte swapping for reading/writing registers

2014-06-16 13:24:27 +02:00

helper_regs.h

PPC: Only enter MSR_POW when no interrupts pending

2014-04-08 11:20:05 +02:00

helper.h

target-ppc: Introduce DFP Shift Significand

2014-06-16 13:24:32 +02:00

int_helper.c

target-ppc: Refactor AES Instructions

2014-06-16 13:24:33 +02:00

kvm_ppc.c

…

kvm_ppc.h

target-ppc: add PowerPCCPU::cpu_dt_id

2014-03-05 03:07:03 +01:00

kvm-stub.c

…

kvm.c

KVM: PPC: Don't secretly add 1T segment feature to CPU

2014-06-16 13:24:33 +02:00

machine.c

target-ppc: Remove PVR check from migration

2014-06-16 13:24:27 +02:00

Makefile.objs

target-ppc: Introduce DFP Helper Utilities

2014-06-16 13:24:29 +02:00

mem_helper.c

softmmu: introduce cpu_ldst.h

2014-06-05 16:10:33 +02:00

mfrom_table_gen.c

…

mfrom_table.c

…

misc_helper.c

tcg: Invert the inclusion of helper.h

2014-05-28 09:33:54 -07:00

mmu_helper.c

softmmu: introduce cpu_ldst.h

2014-06-05 16:10:33 +02:00

mmu-hash32.c

tcg: Invert the inclusion of helper.h

2014-05-28 09:33:54 -07:00

mmu-hash32.h

target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook

2014-03-13 19:20:48 +01:00

mmu-hash64.c

tcg: Invert the inclusion of helper.h

2014-05-28 09:33:54 -07:00

mmu-hash64.h

target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook

2014-03-13 19:20:48 +01:00

STATUS

target-ppc: remove powerpc 970gx

2014-03-05 03:06:23 +01:00

timebase_helper.c

tcg: Invert the inclusion of helper.h

2014-05-28 09:33:54 -07:00

translate_init.c

PPC: Properly emulate L1CSR0 and L1CSR1

2014-06-16 13:24:35 +02:00

translate.c

PPC: Fail on leaking temporaries

2014-06-16 13:24:34 +02:00

user_only_helper.c

cpu: Move exception_index field from CPU_COMMON to CPUState

2014-03-13 19:20:46 +01:00