qemu/target
Max Chou ea61ef7097 target/riscv: Move vector crypto extensions to riscv_cpu_extensions
Because the vector crypto specification is ratified, so move theses
extensions from riscv_cpu_experimental_exts to riscv_cpu_extensions.

Signed-off-by: Max Chou <max.chou@sifive.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20231026151828.754279-11-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-07 11:06:02 +10:00
..
alpha
arm target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk 2023-11-02 13:36:45 +00:00
avr
cris
hexagon
hppa
i386 kvm: i8254: require KVM_CAP_PIT2 and KVM_CAP_PIT_STATE2 2023-10-25 19:53:38 +02:00
loongarch linux-user/loongarch64: Use traps to track LSX/LASX usage 2023-11-03 14:13:18 +08:00
m68k
microblaze
mips
nios2
openrisc
ppc
riscv target/riscv: Move vector crypto extensions to riscv_cpu_extensions 2023-11-07 11:06:02 +10:00
rx
s390x
sh4
sparc target/sparc: Check for invalid cond in gen_compare_reg 2023-11-05 12:07:21 -08:00
tricore
xtensa
Kconfig
meson.build