Richard Henderson 3213da7b95 tcg/ppc: Use TCG_REG_TMP2 for scratch index in prepare_host_addr ... In tcg_out_qemu_ldst_i128, we need a non-zero index register, which we then use as a base register in several address modes. Since we always have TCG_REG_TMP2 available, use that. Cc: qemu-stable@nongnu.org Fixes: 526cd4ec01 ("tcg/ppc: Support 128-bit load/store") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2597 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-By: Michael Tokarev <mjt@tls.msk.ru>		2024-10-08 06:40:31 -07:00
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tcg-target-con-set.h	tcg/ppc: Optimize cmpsel with constant 0/-1 arguments	2024-09-22 06:54:50 +02:00
tcg-target-con-str.h	tcg/ppc: Add TCG_CT_CONST_CMP	2024-02-03 23:53:49 +00:00
tcg-target-reg-bits.h	tcg: Split out tcg-target-reg-bits.h	2023-06-05 12:04:28 -07:00
tcg-target.c.inc	tcg/ppc: Use TCG_REG_TMP2 for scratch index in prepare_host_addr	2024-10-08 06:40:31 -07:00
tcg-target.h	tcg/ppc: Implement cmpsel_vec	2024-09-22 06:54:50 +02:00
tcg-target.opc.h	tcg/ppc: Implement INDEX_op_rot[lr]v_vec	2020-06-02 08:42:37 -07:00