e9845f0985
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
qemu-system-x86_64 -device e1000,mitigation=on,... ...
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
345 lines
10 KiB
C
345 lines
10 KiB
C
#ifndef HW_PC_H
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#define HW_PC_H
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#include "qemu-common.h"
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#include "exec/memory.h"
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#include "hw/isa/isa.h"
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#include "hw/block/fdc.h"
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#include "net/net.h"
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#include "hw/i386/ioapic.h"
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#include "qemu/range.h"
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/* PC-style peripherals (also used by other machines). */
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typedef struct PcPciInfo {
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Range w32;
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Range w64;
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} PcPciInfo;
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struct PcGuestInfo {
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bool has_pci_info;
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bool isapc_ram_fw;
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FWCfgState *fw_cfg;
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};
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/* parallel.c */
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static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
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{
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DeviceState *dev;
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ISADevice *isadev;
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isadev = isa_try_create(bus, "isa-parallel");
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if (!isadev) {
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return false;
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}
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dev = DEVICE(isadev);
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qdev_prop_set_uint32(dev, "index", index);
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qdev_prop_set_chr(dev, "chardev", chr);
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if (qdev_init(dev) < 0) {
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return false;
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}
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return true;
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}
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bool parallel_mm_init(MemoryRegion *address_space,
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hwaddr base, int it_shift, qemu_irq irq,
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CharDriverState *chr);
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/* i8259.c */
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extern DeviceState *isa_pic;
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qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
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qemu_irq *kvm_i8259_init(ISABus *bus);
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int pic_read_irq(DeviceState *d);
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int pic_get_output(DeviceState *d);
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void pic_info(Monitor *mon, const QDict *qdict);
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void irq_info(Monitor *mon, const QDict *qdict);
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/* Global System Interrupts */
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#define GSI_NUM_PINS IOAPIC_NUM_PINS
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typedef struct GSIState {
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qemu_irq i8259_irq[ISA_NUM_IRQS];
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qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
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} GSIState;
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void gsi_handler(void *opaque, int n, int level);
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/* vmport.c */
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typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
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static inline void vmport_init(ISABus *bus)
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{
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isa_create_simple(bus, "vmport");
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}
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void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
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void vmmouse_get_data(uint32_t *data);
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void vmmouse_set_data(const uint32_t *data);
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/* pckbd.c */
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void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
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void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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MemoryRegion *region, ram_addr_t size,
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hwaddr mask);
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void i8042_isa_mouse_fake_event(void *opaque);
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void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
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/* pc.c */
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extern int fd_bootchk;
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void pc_register_ferr_irq(qemu_irq irq);
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void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
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void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
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void pc_hot_add_cpu(const int64_t id, Error **errp);
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void pc_acpi_init(const char *default_dsdt);
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PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
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ram_addr_t above_4g_mem_size);
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#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
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#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
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#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
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#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
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#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
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#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
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static inline uint64_t pci_host_get_hole64_size(uint64_t pci_hole64_size)
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{
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if (pci_hole64_size == DEFAULT_PCI_HOLE64_SIZE) {
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return 1ULL << 62;
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} else {
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return pci_hole64_size;
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}
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}
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void pc_init_pci64_hole(PcPciInfo *pci_info, uint64_t pci_hole64_start,
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uint64_t pci_hole64_size);
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FWCfgState *pc_memory_init(MemoryRegion *system_memory,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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ram_addr_t below_4g_mem_size,
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ram_addr_t above_4g_mem_size,
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MemoryRegion *rom_memory,
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MemoryRegion **ram_memory,
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PcGuestInfo *guest_info);
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qemu_irq *pc_allocate_cpu_irq(void);
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DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
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void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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ISADevice **rtc_state,
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ISADevice **floppy,
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bool no_vmport);
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void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
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void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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const char *boot_device,
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ISADevice *floppy, BusState *ide0, BusState *ide1,
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ISADevice *s);
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void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
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void pc_pci_device_init(PCIBus *pci_bus);
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typedef void (*cpu_set_smm_t)(int smm, void *arg);
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void cpu_smm_register(cpu_set_smm_t callback, void *arg);
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void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
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/* acpi_piix.c */
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i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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qemu_irq sci_irq, qemu_irq smi_irq,
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int kvm_enabled, FWCfgState *fw_cfg);
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void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
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/* hpet.c */
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extern int no_hpet;
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/* piix_pci.c */
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struct PCII440FXState;
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typedef struct PCII440FXState PCII440FXState;
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PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
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ISABus **isa_bus, qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io,
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ram_addr_t ram_size,
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hwaddr pci_hole_start,
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hwaddr pci_hole_size,
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ram_addr_t above_4g_mem_size,
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MemoryRegion *pci_memory,
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MemoryRegion *ram_memory);
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/* piix4.c */
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extern PCIDevice *piix4_dev;
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int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
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/* vga.c */
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enum vga_retrace_method {
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VGA_RETRACE_DUMB,
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VGA_RETRACE_PRECISE
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};
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extern enum vga_retrace_method vga_retrace_method;
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int isa_vga_mm_init(hwaddr vram_base,
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hwaddr ctrl_base, int it_shift,
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MemoryRegion *address_space);
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/* ne2000.c */
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static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
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{
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DeviceState *dev;
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ISADevice *isadev;
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qemu_check_nic_model(nd, "ne2k_isa");
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isadev = isa_try_create(bus, "ne2k_isa");
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if (!isadev) {
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return false;
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}
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dev = DEVICE(isadev);
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qdev_prop_set_uint32(dev, "iobase", base);
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qdev_prop_set_uint32(dev, "irq", irq);
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qdev_set_nic_properties(dev, nd);
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qdev_init_nofail(dev);
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return true;
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}
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/* pc_sysfw.c */
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void pc_system_firmware_init(MemoryRegion *rom_memory,
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bool isapc_ram_fw);
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/* pvpanic.c */
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void pvpanic_init(ISABus *bus);
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/* e820 types */
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#define E820_RAM 1
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#define E820_RESERVED 2
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#define E820_ACPI 3
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#define E820_NVS 4
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#define E820_UNUSABLE 5
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int e820_add_entry(uint64_t, uint64_t, uint32_t);
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#define PC_COMPAT_1_6 \
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{\
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.driver = "e1000",\
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.property = "mitigation",\
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.value = "off",\
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}
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#define PC_COMPAT_1_5 \
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PC_COMPAT_1_6, \
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{\
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.driver = "Conroe-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(2),\
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},{\
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.driver = "Conroe-" TYPE_X86_CPU,\
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.property = "level",\
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.value = stringify(2),\
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},{\
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.driver = "Penryn-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(2),\
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},{\
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.driver = "Penryn-" TYPE_X86_CPU,\
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.property = "level",\
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.value = stringify(2),\
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},{\
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.driver = "Nehalem-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(2),\
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},{\
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.driver = "Nehalem-" TYPE_X86_CPU,\
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.property = "level",\
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.value = stringify(2),\
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},{\
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.driver = "virtio-net-pci",\
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.property = "any_layout",\
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.value = "off",\
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},{\
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.driver = TYPE_X86_CPU,\
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.property = "pmu",\
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.value = "on",\
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}
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#define PC_COMPAT_1_4 \
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PC_COMPAT_1_5, \
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{\
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.driver = "scsi-hd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "scsi-cd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "scsi-disk",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "ide-hd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "ide-cd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "ide-drive",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "virtio-blk-pci",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "virtio-serial-pci",\
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.property = "vectors",\
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/* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
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.value = stringify(0xFFFFFFFF),\
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},{ \
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.driver = "virtio-net-pci", \
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.property = "ctrl_guest_offloads", \
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.value = "off", \
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},{\
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.driver = "e1000",\
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.property = "romfile",\
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.value = "pxe-e1000.rom",\
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},{\
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.driver = "ne2k_pci",\
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.property = "romfile",\
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.value = "pxe-ne2k_pci.rom",\
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},{\
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.driver = "pcnet",\
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.property = "romfile",\
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.value = "pxe-pcnet.rom",\
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},{\
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.driver = "rtl8139",\
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.property = "romfile",\
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.value = "pxe-rtl8139.rom",\
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},{\
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.driver = "virtio-net-pci",\
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.property = "romfile",\
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.value = "pxe-virtio.rom",\
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},{\
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.driver = "486-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(0),\
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}
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#define PC_COMMON_MACHINE_OPTIONS \
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.default_boot_order = "cad"
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#define PC_DEFAULT_MACHINE_OPTIONS \
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PC_COMMON_MACHINE_OPTIONS, \
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.hot_add_cpu = pc_hot_add_cpu, \
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.max_cpus = 255
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#endif
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