qemu/target
Wu Xiang e95e9b88ba target/i386: fix interrupt CPL error when using ist in x86-64
In do_interrupt64(), when interrupt stack table(ist) is enabled
and the the target code segment is conforming(e2 & DESC_C_MASK), the
old implementation always set new CPL to 0, and SS.RPL to 0.

This is incorrect for when CPL3 code access a CPL0 conforming code
segment, the CPL should remain unchanged. Otherwise higher privileged
code can be compromised.

The patch fix this for always set dpl = cpl when the target code segment
is conforming, and modify the last parameter `flags`, which contains
correct new CPL, in cpu_x86_load_seg_cache().

Signed-off-by: Wu Xiang <willx8@gmail.com>
Message-Id: <20170621142152.GA18094@wxdeubuntu.ipads-lab.se.sjtu.edu.cn>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-07-04 14:30:03 +02:00
..
alpha target/alpha: Use tcg_gen_lookup_and_goto_ptr 2017-06-19 11:11:25 -07:00
arm target/arm: Exit after clearing aarch64 interrupt mask 2017-06-19 11:11:26 -07:00
cris qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
hppa target/hppa: Use tcg_gen_lookup_and_goto_ptr 2017-06-05 09:25:42 -07:00
i386 target/i386: fix interrupt CPL error when using ist in x86-64 2017-07-04 14:30:03 +02:00
lm32 qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
m68k target/m68k: add fmovem 2017-06-29 20:29:57 +02:00
microblaze cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
mips vcpu_dirty: share the same field in CPUState for all accelerators 2017-07-04 14:30:03 +02:00
moxie qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
nios2 target/nios2: Fix 64-bit ilp32 compilation 2017-06-05 09:25:42 -07:00
openrisc target/openrisc: Support non-busy idle state using PMR SPR 2017-05-04 09:39:14 +09:00
ppc target/ppc: Proper cleanup when ppc_cpu_realizefn fails 2017-06-30 14:03:31 +10:00
s390x target/s390x: Implement idte instruction 2017-06-23 09:17:45 -07:00
sh4 target/sh4: fix RTE instruction delay slot 2017-05-30 21:00:56 +02:00
sparc shutdown: Add source information to SHUTDOWN and RESET 2017-05-23 13:28:17 +02:00
tilegx migration: Remove unneeded includes of migration/vmstate.h 2017-06-01 18:49:22 +02:00
tricore qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
unicore32 cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
xtensa target/xtensa: handle unknown registers in gdbstub 2017-06-06 02:40:48 -07:00