f7d8afb16d
Names of user-provided fw_cfg items are supposed to start with "opt/". However FW_CFG_DATA_GENERATOR items are generated by QEMU, so allow the "etc/" namespace in this specific case. Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20200623172726.21040-5-philmd@redhat.com>
266 lines
11 KiB
Plaintext
266 lines
11 KiB
Plaintext
QEMU Firmware Configuration (fw_cfg) Device
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===========================================
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= Guest-side Hardware Interface =
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This hardware interface allows the guest to retrieve various data items
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(blobs) that can influence how the firmware configures itself, or may
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contain tables to be installed for the guest OS. Examples include device
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boot order, ACPI and SMBIOS tables, virtual machine UUID, SMP and NUMA
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information, kernel/initrd images for direct (Linux) kernel booting, etc.
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== Selector (Control) Register ==
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* Write only
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* Location: platform dependent (IOport or MMIO)
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* Width: 16-bit
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* Endianness: little-endian (if IOport), or big-endian (if MMIO)
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A write to this register sets the index of a firmware configuration
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item which can subsequently be accessed via the data register.
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Setting the selector register will cause the data offset to be set
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to zero. The data offset impacts which data is accessed via the data
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register, and is explained below.
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Bit14 of the selector register indicates whether the configuration
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setting is being written. A value of 0 means the item is only being
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read, and all write access to the data port will be ignored. A value
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of 1 means the item's data can be overwritten by writes to the data
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register. In other words, configuration write mode is enabled when
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the selector value is between 0x4000-0x7fff or 0xc000-0xffff.
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NOTE: As of QEMU v2.4, writes to the fw_cfg data register are no
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longer supported, and will be ignored (treated as no-ops)!
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NOTE: As of QEMU v2.9, writes are reinstated, but only through the DMA
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interface (see below). Furthermore, writeability of any specific item is
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governed independently of Bit14 in the selector key value.
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Bit15 of the selector register indicates whether the configuration
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setting is architecture specific. A value of 0 means the item is a
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generic configuration item. A value of 1 means the item is specific
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to a particular architecture. In other words, generic configuration
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items are accessed with a selector value between 0x0000-0x7fff, and
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architecture specific configuration items are accessed with a selector
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value between 0x8000-0xffff.
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== Data Register ==
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* Read/Write (writes ignored as of QEMU v2.4, but see the DMA interface)
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* Location: platform dependent (IOport [*] or MMIO)
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* Width: 8-bit (if IOport), 8/16/32/64-bit (if MMIO)
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* Endianness: string-preserving
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[*] On platforms where the data register is exposed as an IOport, its
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port number will always be one greater than the port number of the
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selector register. In other words, the two ports overlap, and can not
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be mapped separately.
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The data register allows access to an array of bytes for each firmware
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configuration data item. The specific item is selected by writing to
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the selector register, as described above.
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Initially following a write to the selector register, the data offset
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will be set to zero. Each successful access to the data register will
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increment the data offset by the appropriate access width.
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Each firmware configuration item has a maximum length of data
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associated with the item. After the data offset has passed the
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end of this maximum data length, then any reads will return a data
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value of 0x00, and all writes will be ignored.
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An N-byte wide read of the data register will return the next available
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N bytes of the selected firmware configuration item, as a substring, in
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increasing address order, similar to memcpy().
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== Register Locations ==
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=== x86, x86_64 Register Locations ===
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Selector Register IOport: 0x510
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Data Register IOport: 0x511
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DMA Address IOport: 0x514
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=== Arm Register Locations ===
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Selector Register address: Base + 8 (2 bytes)
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Data Register address: Base + 0 (8 bytes)
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DMA Address address: Base + 16 (8 bytes)
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== ACPI Interface ==
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The fw_cfg device is defined with ACPI ID "QEMU0002". Since we expect
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ACPI tables to be passed into the guest through the fw_cfg device itself,
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the guest-side firmware can not use ACPI to find fw_cfg. However, once the
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firmware is finished setting up ACPI tables and hands control over to the
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guest kernel, the latter can use the fw_cfg ACPI node for a more accurate
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inventory of in-use IOport or MMIO regions.
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== Firmware Configuration Items ==
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=== Signature (Key 0x0000, FW_CFG_SIGNATURE) ===
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The presence of the fw_cfg selector and data registers can be verified
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by selecting the "signature" item using key 0x0000 (FW_CFG_SIGNATURE),
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and reading four bytes from the data register. If the fw_cfg device is
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present, the four bytes read will contain the characters "QEMU".
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If the DMA interface is available, then reading the DMA Address
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Register returns 0x51454d5520434647 ("QEMU CFG" in big-endian format).
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=== Revision / feature bitmap (Key 0x0001, FW_CFG_ID) ===
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A 32-bit little-endian unsigned int, this item is used to check for enabled
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features.
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- Bit 0: traditional interface. Always set.
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- Bit 1: DMA interface.
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=== File Directory (Key 0x0019, FW_CFG_FILE_DIR) ===
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Firmware configuration items stored at selector keys 0x0020 or higher
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(FW_CFG_FILE_FIRST or higher) have an associated entry in a directory
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structure, which makes it easier for guest-side firmware to identify
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and retrieve them. The format of this file directory (from fw_cfg.h in
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the QEMU source tree) is shown here, slightly annotated for clarity:
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struct FWCfgFiles { /* the entire file directory fw_cfg item */
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uint32_t count; /* number of entries, in big-endian format */
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struct FWCfgFile f[]; /* array of file entries, see below */
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};
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struct FWCfgFile { /* an individual file entry, 64 bytes total */
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uint32_t size; /* size of referenced fw_cfg item, big-endian */
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uint16_t select; /* selector key of fw_cfg item, big-endian */
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uint16_t reserved;
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char name[56]; /* fw_cfg item name, NUL-terminated ascii */
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};
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=== All Other Data Items ===
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Please consult the QEMU source for the most up-to-date and authoritative list
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of selector keys and their respective items' purpose, format and writeability.
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=== Ranges ===
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Theoretically, there may be up to 0x4000 generic firmware configuration
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items, and up to 0x4000 architecturally specific ones.
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Selector Reg. Range Usage
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--------------- -----------
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0x0000 - 0x3fff Generic (0x0000 - 0x3fff, generally RO, possibly RW through
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the DMA interface in QEMU v2.9+)
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0x4000 - 0x7fff Generic (0x0000 - 0x3fff, RW, ignored in QEMU v2.4+)
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0x8000 - 0xbfff Arch. Specific (0x0000 - 0x3fff, generally RO, possibly RW
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through the DMA interface in QEMU v2.9+)
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0xc000 - 0xffff Arch. Specific (0x0000 - 0x3fff, RW, ignored in v2.4+)
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In practice, the number of allowed firmware configuration items depends on the
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machine type/version.
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= Guest-side DMA Interface =
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If bit 1 of the feature bitmap is set, the DMA interface is present. This does
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not replace the existing fw_cfg interface, it is an add-on. This interface
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can be used through the 64-bit wide address register.
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The address register is in big-endian format. The value for the register is 0
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at startup and after an operation. A write to the least significant half (at
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offset 4) triggers an operation. This means that operations with 32-bit
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addresses can be triggered with just one write, whereas operations with
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64-bit addresses can be triggered with one 64-bit write or two 32-bit writes,
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starting with the most significant half (at offset 0).
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In this register, the physical address of a FWCfgDmaAccess structure in RAM
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should be written. This is the format of the FWCfgDmaAccess structure:
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typedef struct FWCfgDmaAccess {
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uint32_t control;
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uint32_t length;
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uint64_t address;
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} FWCfgDmaAccess;
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The fields of the structure are in big endian mode, and the field at the lowest
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address is the "control" field.
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The "control" field has the following bits:
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- Bit 0: Error
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- Bit 1: Read
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- Bit 2: Skip
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- Bit 3: Select. The upper 16 bits are the selected index.
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- Bit 4: Write
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When an operation is triggered, if the "control" field has bit 3 set, the
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upper 16 bits are interpreted as an index of a firmware configuration item.
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This has the same effect as writing the selector register.
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If the "control" field has bit 1 set, a read operation will be performed.
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"length" bytes for the current selector and offset will be copied into the
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physical RAM address specified by the "address" field.
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If the "control" field has bit 4 set (and not bit 1), a write operation will be
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performed. "length" bytes will be copied from the physical RAM address
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specified by the "address" field to the current selector and offset. QEMU
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prevents starting or finishing the write beyond the end of the item associated
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with the current selector (i.e., the item cannot be resized). Truncated writes
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are dropped entirely. Writes to read-only items are also rejected. All of these
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write errors set bit 0 (the error bit) in the "control" field.
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If the "control" field has bit 2 set (and neither bit 1 nor bit 4), a skip
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operation will be performed. The offset for the current selector will be
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advanced "length" bytes.
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To check the result, read the "control" field:
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error bit set -> something went wrong.
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all bits cleared -> transfer finished successfully.
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otherwise -> transfer still in progress (doesn't happen
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today due to implementation not being async,
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but may in the future).
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= Externally Provided Items =
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Since v2.4, "file" fw_cfg items (i.e., items with selector keys above
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FW_CFG_FILE_FIRST, and with a corresponding entry in the fw_cfg file
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directory structure) may be inserted via the QEMU command line, using
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the following syntax:
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-fw_cfg [name=]<item_name>,file=<path>
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Or
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-fw_cfg [name=]<item_name>,string=<string>
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Since v5.1, QEMU allows some objects to generate fw_cfg-specific content,
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the content is then associated with a "file" item using the 'gen_id' option
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in the command line, using the following syntax:
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-object <generator-type>,id=<generated_id>,[generator-specific-options] \
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-fw_cfg [name=]<item_name>,gen_id=<generated_id>
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See QEMU man page for more documentation.
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Using item_name with plain ASCII characters only is recommended.
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Item names beginning with "opt/" are reserved for users. QEMU will
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never create entries with such names unless explicitly ordered by the
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user.
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To avoid clashes among different users, it is strongly recommended
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that you use names beginning with opt/RFQDN/, where RFQDN is a reverse
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fully qualified domain name you control. For instance, if SeaBIOS
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wanted to define additional names, the prefix "opt/org.seabios/" would
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be appropriate.
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For historical reasons, "opt/ovmf/" is reserved for OVMF firmware.
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Prefix "opt/org.qemu/" is reserved for QEMU itself.
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Use of names not beginning with "opt/" is potentially dangerous and
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entirely unsupported. QEMU will warn if you try.
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Use of names not beginning with "opt/" is tolerated with 'gen_id' (that
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is, the warning is suppressed), but you must know exactly what you're
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doing.
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All externally provided fw_cfg items are read-only to the guest.
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