e28b77a6b4
We assign the instruction destination register to hex_new_value[num]
instead of a TCG temp that gets copied back to hex_new_value[num].
We introduce new functions get_result_gpr[_pair] to facilitate getting
the proper destination register.
Since we preload hex_new_value for predicated instructions, we don't
need the check for slot_cancelled. So, we call gen_log_reg_write instead.
We update the helper function generation and gen_tcg.h to maintain the
disable-hexagon-idef-parser configuration.
Here is a simple example of the differences in the TCG code generated:
IN:
0x00400094: 0xf900c102 { if (P0) R2 = and(R0,R1) }
BEFORE
---- 00400094
mov_i32 slot_cancelled,$0x0
mov_i32 new_r2,r2
mov_i32 loc2,$0x0
and_i32 tmp0,p0,$0x1
brcond_i32 tmp0,$0x0,eq,$L1
and_i32 tmp0,r0,r1
mov_i32 loc2,tmp0
br $L2
set_label $L1
or_i32 slot_cancelled,slot_cancelled,$0x8
set_label $L2
and_i32 tmp0,slot_cancelled,$0x8
movcond_i32 new_r2,tmp0,$0x0,loc2,new_r2,eq
mov_i32 r2,new_r2
AFTER
---- 00400094
mov_i32 slot_cancelled,$0x0
mov_i32 new_r2,r2
and_i32 tmp0,p0,$0x1
brcond_i32 tmp0,$0x0,eq,$L1
and_i32 tmp0,r0,r1
mov_i32 new_r2,tmp0
br $L2
set_label $L1
or_i32 slot_cancelled,slot_cancelled,$0x8
set_label $L2
mov_i32 r2,new_r2
We'll remove the unnecessary manipulation of slot_cancelled in a
subsequent patch.
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230307025828.1612809-13-tsimpson@quicinc.com>
351 lines
13 KiB
Python
Executable File
351 lines
13 KiB
Python
Executable File
#!/usr/bin/env python3
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##
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## Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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import sys
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import re
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import string
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import hex_common
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##
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## Helpers for gen_helper_function
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##
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def gen_decl_ea(f):
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f.write(" uint32_t EA;\n")
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def gen_helper_return_type(f,regtype,regid,regno):
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if regno > 1 : f.write(", ")
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f.write("int32_t")
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def gen_helper_return_type_pair(f,regtype,regid,regno):
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if regno > 1 : f.write(", ")
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f.write("int64_t")
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def gen_helper_arg(f,regtype,regid,regno):
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if regno > 0 : f.write(", " )
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f.write("int32_t %s%sV" % (regtype,regid))
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def gen_helper_arg_new(f,regtype,regid,regno):
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if regno >= 0 : f.write(", " )
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f.write("int32_t %s%sN" % (regtype,regid))
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def gen_helper_arg_pair(f,regtype,regid,regno):
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if regno >= 0 : f.write(", ")
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f.write("int64_t %s%sV" % (regtype,regid))
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def gen_helper_arg_ext(f,regtype,regid,regno):
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if regno > 0 : f.write(", ")
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f.write("void *%s%sV_void" % (regtype,regid))
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def gen_helper_arg_ext_pair(f,regtype,regid,regno):
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if regno > 0 : f.write(", ")
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f.write("void *%s%sV_void" % (regtype,regid))
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def gen_helper_arg_opn(f,regtype,regid,i,tag):
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if (hex_common.is_pair(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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gen_helper_arg_ext_pair(f,regtype,regid,i)
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else:
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gen_helper_arg_pair(f,regtype,regid,i)
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elif (hex_common.is_single(regid)):
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if hex_common.is_old_val(regtype, regid, tag):
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if (hex_common.is_hvx_reg(regtype)):
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gen_helper_arg_ext(f,regtype,regid,i)
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else:
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gen_helper_arg(f,regtype,regid,i)
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elif hex_common.is_new_val(regtype, regid, tag):
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gen_helper_arg_new(f,regtype,regid,i)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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def gen_helper_arg_imm(f,immlett):
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f.write(", int32_t %s" % (hex_common.imm_name(immlett)))
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def gen_helper_dest_decl(f,regtype,regid,regno,subfield=""):
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f.write(" int32_t %s%sV%s = 0;\n" % \
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(regtype,regid,subfield))
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def gen_helper_dest_decl_pair(f,regtype,regid,regno,subfield=""):
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f.write(" int64_t %s%sV%s = 0;\n" % \
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(regtype,regid,subfield))
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def gen_helper_dest_decl_ext(f,regtype,regid):
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if (regtype == "Q"):
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f.write(" /* %s%sV is *(MMQReg *)(%s%sV_void) */\n" % \
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(regtype,regid,regtype,regid))
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else:
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f.write(" /* %s%sV is *(MMVector *)(%s%sV_void) */\n" % \
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(regtype,regid,regtype,regid))
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def gen_helper_dest_decl_ext_pair(f,regtype,regid,regno):
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f.write(" /* %s%sV is *(MMVectorPair *))%s%sV_void) */\n" % \
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(regtype,regid,regtype, regid))
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def gen_helper_dest_decl_opn(f,regtype,regid,i):
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if (hex_common.is_pair(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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gen_helper_dest_decl_ext_pair(f,regtype,regid, i)
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else:
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gen_helper_dest_decl_pair(f,regtype,regid,i)
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elif (hex_common.is_single(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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gen_helper_dest_decl_ext(f,regtype,regid)
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else:
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gen_helper_dest_decl(f,regtype,regid,i)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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def gen_helper_src_var_ext(f,regtype,regid):
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if (regtype == "Q"):
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f.write(" /* %s%sV is *(MMQReg *)(%s%sV_void) */\n" % \
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(regtype,regid,regtype,regid))
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else:
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f.write(" /* %s%sV is *(MMVector *)(%s%sV_void) */\n" % \
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(regtype,regid,regtype,regid))
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def gen_helper_src_var_ext_pair(f,regtype,regid,regno):
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f.write(" /* %s%sV%s is *(MMVectorPair *)(%s%sV%s_void) */\n" % \
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(regtype,regid,regno,regtype,regid,regno))
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def gen_helper_return(f,regtype,regid,regno):
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f.write(" return %s%sV;\n" % (regtype,regid))
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def gen_helper_return_pair(f,regtype,regid,regno):
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f.write(" return %s%sV;\n" % (regtype,regid))
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def gen_helper_dst_write_ext(f,regtype,regid):
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return
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def gen_helper_dst_write_ext_pair(f,regtype,regid):
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return
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def gen_helper_return_opn(f, regtype, regid, i):
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if (hex_common.is_pair(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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gen_helper_dst_write_ext_pair(f,regtype,regid)
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else:
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gen_helper_return_pair(f,regtype,regid,i)
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elif (hex_common.is_single(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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gen_helper_dst_write_ext(f,regtype,regid)
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else:
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gen_helper_return(f,regtype,regid,i)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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##
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## Generate the TCG code to call the helper
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## For A2_add: Rd32=add(Rs32,Rt32), { RdV=RsV+RtV;}
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## We produce:
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## int32_t HELPER(A2_add)(CPUHexagonState *env, int32_t RsV, int32_t RtV)
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## {
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## uint32_t slot __attribute__(unused)) = 4;
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## int32_t RdV = 0;
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## { RdV=RsV+RtV;}
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## COUNT_HELPER(A2_add);
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## return RdV;
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## }
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##
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def gen_helper_function(f, tag, tagregs, tagimms):
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regs = tagregs[tag]
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imms = tagimms[tag]
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numresults = 0
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numscalarresults = 0
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numscalarreadwrite = 0
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_written(regid)):
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numresults += 1
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if (hex_common.is_scalar_reg(regtype)):
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numscalarresults += 1
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if (hex_common.is_readwrite(regid)):
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if (hex_common.is_scalar_reg(regtype)):
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numscalarreadwrite += 1
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if (numscalarresults > 1):
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## The helper is bogus when there is more than one result
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f.write("void HELPER(%s)(CPUHexagonState *env) { BOGUS_HELPER(%s); }\n"
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% (tag, tag))
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else:
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## The return type of the function is the type of the destination
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## register (if scalar)
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i=0
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_written(regid)):
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if (hex_common.is_pair(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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continue
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else:
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gen_helper_return_type_pair(f,regtype,regid,i)
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elif (hex_common.is_single(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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continue
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else:
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gen_helper_return_type(f,regtype,regid,i)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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i += 1
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if (numscalarresults == 0):
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f.write("void")
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f.write(" HELPER(%s)(CPUHexagonState *env" % tag)
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## Arguments include the vector destination operands
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i = 1
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_written(regid)):
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if (hex_common.is_pair(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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gen_helper_arg_ext_pair(f,regtype,regid,i)
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else:
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continue
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elif (hex_common.is_single(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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gen_helper_arg_ext(f,regtype,regid,i)
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else:
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# This is the return value of the function
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continue
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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i += 1
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## For conditional instructions, we pass in the destination register
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if 'A_CONDEXEC' in hex_common.attribdict[tag]:
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for regtype, regid, toss, numregs in regs:
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if (hex_common.is_writeonly(regid) and
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not hex_common.is_hvx_reg(regtype)):
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gen_helper_arg_opn(f, regtype, regid, i, tag)
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i += 1
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## Arguments to the helper function are the source regs and immediates
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_read(regid)):
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if (hex_common.is_hvx_reg(regtype) and
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hex_common.is_readwrite(regid)):
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continue
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gen_helper_arg_opn(f,regtype,regid,i,tag)
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i += 1
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for immlett,bits,immshift in imms:
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gen_helper_arg_imm(f,immlett)
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i += 1
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if (hex_common.need_pkt_has_multi_cof(tag)):
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f.write(", uint32_t pkt_has_multi_cof")
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if hex_common.need_PC(tag):
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if i > 0: f.write(", ")
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f.write("target_ulong PC")
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i += 1
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if hex_common.helper_needs_next_PC(tag):
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if i > 0: f.write(", ")
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f.write("target_ulong next_PC")
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i += 1
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if hex_common.need_slot(tag):
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if i > 0: f.write(", ")
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f.write("uint32_t slot")
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i += 1
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if hex_common.need_part1(tag):
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if i > 0: f.write(", ")
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f.write("uint32_t part1")
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f.write(")\n{\n")
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if (not hex_common.need_slot(tag)):
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f.write(" uint32_t slot __attribute__((unused)) = 4;\n" )
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if hex_common.need_ea(tag): gen_decl_ea(f)
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## Declare the return variable
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i=0
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if 'A_CONDEXEC' not in hex_common.attribdict[tag]:
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_writeonly(regid)):
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gen_helper_dest_decl_opn(f,regtype,regid,i)
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i += 1
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_read(regid)):
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if (hex_common.is_pair(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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gen_helper_src_var_ext_pair(f,regtype,regid,i)
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elif (hex_common.is_single(regid)):
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if (hex_common.is_hvx_reg(regtype)):
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gen_helper_src_var_ext(f,regtype,regid)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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if 'A_FPOP' in hex_common.attribdict[tag]:
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f.write(' arch_fpop_start(env);\n');
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f.write(" %s\n" % hex_common.semdict[tag])
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if 'A_FPOP' in hex_common.attribdict[tag]:
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f.write(' arch_fpop_end(env);\n');
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## Save/return the return variable
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_written(regid)):
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gen_helper_return_opn(f, regtype, regid, i)
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f.write("}\n\n")
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## End of the helper definition
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def main():
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hex_common.read_semantics_file(sys.argv[1])
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hex_common.read_attribs_file(sys.argv[2])
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hex_common.read_overrides_file(sys.argv[3])
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hex_common.read_overrides_file(sys.argv[4])
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## Whether or not idef-parser is enabled is
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## determined by the number of arguments to
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## this script:
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##
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## 5 args. -> not enabled,
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## 6 args. -> idef-parser enabled.
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##
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## The 6:th arg. then holds a list of the successfully
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## parsed instructions.
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is_idef_parser_enabled = len(sys.argv) > 6
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if is_idef_parser_enabled:
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hex_common.read_idef_parser_enabled_file(sys.argv[5])
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hex_common.calculate_attribs()
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tagregs = hex_common.get_tagregs()
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tagimms = hex_common.get_tagimms()
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output_file = sys.argv[-1]
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with open(output_file, 'w') as f:
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for tag in hex_common.tags:
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## Skip the priv instructions
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if ( "A_PRIV" in hex_common.attribdict[tag] ) :
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continue
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## Skip the guest instructions
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if ( "A_GUEST" in hex_common.attribdict[tag] ) :
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continue
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## Skip the diag instructions
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if ( tag == "Y6_diag" ) :
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continue
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if ( tag == "Y6_diag0" ) :
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continue
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if ( tag == "Y6_diag1" ) :
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continue
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if ( hex_common.skip_qemu_helper(tag) ):
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continue
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if ( hex_common.is_idef_parser_enabled(tag) ):
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continue
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gen_helper_function(f, tag, tagregs, tagimms)
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if __name__ == "__main__":
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main()
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