Peter Maydell
e83d74286c
target-arm queue:
* New machine mps2-an521 -- this is a model of the AN521 FPGA image for the MPS2 devboard
* Fix various places where we failed to UNDEF invalid A64 instructions
* Don't UNDEF a valid FCMLA on 32-bit inputs
* Fix some bugs in the newly-added PAuth implementation
* microbit: Implement NVMC non-volatile memory controller
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190201' into staging
target-arm queue:
* New machine mps2-an521 -- this is a model of the AN521 FPGA image for the MPS2 devboard
* Fix various places where we failed to UNDEF invalid A64 instructions
* Don't UNDEF a valid FCMLA on 32-bit inputs
* Fix some bugs in the newly-added PAuth implementation
* microbit: Implement NVMC non-volatile memory controller
# gpg: Signature made Fri 01 Feb 2019 16:06:03 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20190201: (47 commits)
tests/microbit-test: Add tests for nRF51 NVMC
arm: Instantiate NRF51 special NVM's and NVMC
hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories
target/arm: fix decoding of B{,L}RA{A,B}
target/arm: fix AArch64 virtual address space size
linux-user: Initialize aarch64 pac keys
aarch64-linux-user: Enable HWCAP bits for PAuth
aarch64-linux-user: Update HWCAP bits from linux 5.0-rc1
target/arm: Always enable pac keys for user-only
arm: Clarify the logic of set_pc()
target/arm: Enable API, APK bits in SCR, HCR
target/arm: Add a timer to predict PMU counter overflow
target/arm: Send interrupts on PMU counter overflow
target/arm/translate-a64: Fix mishandling of size in FCMLA decode
target/arm/translate-a64: Fix FCMLA decoding error
exec.c: Don't reallocate IOMMUNotifiers that are in use
target/arm/translate-a64: Don't underdecode SDOT and UDOT
target/arm/translate-a64: Don't underdecode FP insns
target/arm/translate-a64: Don't underdecode add/sub extended register
target/arm/translate-a64: Don't underdecode SIMD ld/st single
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-01 16:39:17 +00:00
..
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