cda86e2b46
This controls whether the PACI{A,B}SP instructions trap with BTYPE=3
(indirect branch from register other than x16/x17). The linux kernel
sets this in bti_enable().
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/998
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220427042312.294300-1-richard.henderson@linaro.org
[PMM: remove stray change to makefile comment]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
97 lines
2.4 KiB
Makefile
97 lines
2.4 KiB
Makefile
# -*- Mode: makefile -*-
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#
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# AArch64 specific tweaks
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ARM_SRC=$(SRC_PATH)/tests/tcg/arm
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VPATH += $(ARM_SRC)
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AARCH64_SRC=$(SRC_PATH)/tests/tcg/aarch64
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VPATH += $(AARCH64_SRC)
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# Base architecture tests
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AARCH64_TESTS=fcvt pcalign-a64
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fcvt: LDFLAGS+=-lm
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run-fcvt: fcvt
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$(call run-test,$<,$(QEMU) $<, "$< on $(TARGET_NAME)")
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$(call diff-out,$<,$(AARCH64_SRC)/fcvt.ref)
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# Pauth Tests
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ifneq ($(CROSS_CC_HAS_ARMV8_3),)
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AARCH64_TESTS += pauth-1 pauth-2 pauth-4 pauth-5
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pauth-%: CFLAGS += -march=armv8.3-a
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run-pauth-%: QEMU_OPTS += -cpu max
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run-plugin-pauth-%: QEMU_OPTS += -cpu max
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endif
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# BTI Tests
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# bti-1 tests the elf notes, so we require special compiler support.
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ifneq ($(CROSS_CC_HAS_ARMV8_BTI),)
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AARCH64_TESTS += bti-1 bti-3
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bti-1 bti-3: CFLAGS += -mbranch-protection=standard
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bti-1 bti-3: LDFLAGS += -nostdlib
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endif
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# bti-2 tests PROT_BTI, so no special compiler support required.
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AARCH64_TESTS += bti-2
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# MTE Tests
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ifneq ($(CROSS_CC_HAS_ARMV8_MTE),)
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AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7
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mte-%: CFLAGS += -march=armv8.5-a+memtag
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endif
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ifneq ($(CROSS_CC_HAS_SVE),)
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# System Registers Tests
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AARCH64_TESTS += sysregs
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sysregs: CFLAGS+=-march=armv8.1-a+sve
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# SVE ioctl test
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AARCH64_TESTS += sve-ioctls
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sve-ioctls: CFLAGS+=-march=armv8.1-a+sve
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# Vector SHA1
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sha1-vector: CFLAGS=-O3
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sha1-vector: sha1.c
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$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
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run-sha1-vector: sha1-vector run-sha1
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$(call run-test, $<, $(QEMU) $(QEMU_OPTS) $<, "$< on $(TARGET_NAME)")
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$(call diff-out, sha1-vector, sha1.out)
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TESTS += sha1-vector
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# Vector versions of sha512 (-O3 triggers vectorisation)
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sha512-vector: CFLAGS=-O3
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sha512-vector: sha512.c
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$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
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TESTS += sha512-vector
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ifneq ($(HAVE_GDB_BIN),)
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GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py
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run-gdbstub-sysregs: sysregs
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$(call run-test, $@, $(GDB_SCRIPT) \
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--gdb $(HAVE_GDB_BIN) \
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--qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
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--bin $< --test $(AARCH64_SRC)/gdbstub/test-sve.py, \
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"basic gdbstub SVE support")
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run-gdbstub-sve-ioctls: sve-ioctls
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$(call run-test, $@, $(GDB_SCRIPT) \
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--gdb $(HAVE_GDB_BIN) \
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--qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
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--bin $< --test $(AARCH64_SRC)/gdbstub/test-sve-ioctl.py, \
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"basic gdbstub SVE ZLEN support")
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EXTRA_RUNS += run-gdbstub-sysregs run-gdbstub-sve-ioctls
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endif
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endif
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ifneq ($(CROSS_CC_HAS_SVE2),)
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AARCH64_TESTS += test-826
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test-826: CFLAGS+=-march=armv8.1-a+sve2
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endif
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TESTS += $(AARCH64_TESTS)
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