e80865e5f3
Zvfh supports vector float point instructions with SEW = 16 and supports conversions between 8-bit integers and binary16 values. Zvfhmin supports vfwcvt.f.f.v and vfncvt.f.f.w instructions. Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20230215020539.4788-12-liweiwei@iscas.ac.cn> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> |
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trans_privileged.c.inc | ||
trans_rva.c.inc | ||
trans_rvb.c.inc | ||
trans_rvd.c.inc | ||
trans_rvf.c.inc | ||
trans_rvh.c.inc | ||
trans_rvi.c.inc | ||
trans_rvk.c.inc | ||
trans_rvm.c.inc | ||
trans_rvv.c.inc | ||
trans_rvzawrs.c.inc | ||
trans_rvzfh.c.inc | ||
trans_svinval.c.inc | ||
trans_xthead.c.inc | ||
trans_xventanacondops.c.inc |