qemu/target-openrisc
David Morrison 3d59b6808b target-openrisc: bugfix for dec_sys to decode instructions correctly
Fixed the decoding of "system" instructions (starting with 0x2)
in dec_sys() in translate.c.  In particular, the l.trap instruction
is now correctly decoded, which enables for singlestepping and
breakpoints to be set in GDB.

Signed-off-by: David R. Morrison <dmorrison@invlim.com>
Acked-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-01-15 10:44:13 +03:00
..
Makefile.objs
cpu.c target-openrisc: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
cpu.h target-openrisc: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
exception.c
exception.h
exception_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
fpu_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
gdbstub.c
helper.h tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
int_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
interrupt.c target-openrisc: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
interrupt_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
machine.c
mmu.c
mmu_helper.c softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
sys_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
translate.c target-openrisc: bugfix for dec_sys to decode instructions correctly 2015-01-15 10:44:13 +03:00