qemu/tests/tcg/mips/mips32-dsp/dpaq_sa_l_w.c
Petar Jovanovic b6a9f4682e target-mips: fix mipsdsp_mul_q31_q31
Multiplication of two fractional word elements is not correct when sign
extension/promotion is needed. This change fixes it by adding correct
casts from unsigned to signed values.
In addition, the tests (dpaq_sa_l_w.c and dpsq_sa_l_w.c) have been extended
to trigger the current issue.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-29 07:48:17 +02:00

126 lines
3.0 KiB
C

#include<stdio.h>
#include<assert.h>
int main()
{
int rs, rt, dsp;
int ach = 0, acl = 0;
int resulth, resultl, resultdsp;
rs = 0x80000000;
rt = 0x80000000;
resulth = 0x7FFFFFFF;
resultl = 0xFFFFFFFF;
resultdsp = 0x01;
__asm
("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"
"dpaq_sa.l.w $ac1, %3, %4\n\t"
"mfhi %0, $ac1\n\t"
"mflo %1, $ac1\n\t"
"rddsp %2\n\t"
: "+r"(ach), "+r"(acl), "=r"(dsp)
: "r"(rs), "r"(rt)
);
dsp = (dsp >> 17) & 0x01;
assert(dsp == resultdsp);
assert(ach == resulth);
assert(acl == resultl);
ach = 0x00000012;
acl = 0x00000048;
rs = 0x80000000;
rt = 0x80000000;
resulth = 0x7FFFFFFF;
resultl = 0xFFFFFFFF;
resultdsp = 0x01;
__asm
("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"
"dpaq_sa.l.w $ac1, %3, %4\n\t"
"mfhi %0, $ac1\n\t"
"mflo %1, $ac1\n\t"
"rddsp %2\n\t"
: "+r"(ach), "+r"(acl), "=r"(dsp)
: "r"(rs), "r"(rt)
);
dsp = (dsp >> 17) & 0x01;
assert(dsp == resultdsp);
assert(ach == resulth);
assert(acl == resultl);
ach = 0x741532A0;
acl = 0xFCEABB08;
rs = 0x80000000;
rt = 0x80000000;
resulth = 0x7FFFFFFF;
resultl = 0xFFFFFFFF;
resultdsp = 0x01;
__asm
("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"
"dpaq_sa.l.w $ac1, %3, %4\n\t"
"mfhi %0, $ac1\n\t"
"mflo %1, $ac1\n\t"
"rddsp %2\n\t"
: "+r"(ach), "+r"(acl), "=r"(dsp)
: "r"(rs), "r"(rt)
);
dsp = (dsp >> 17) & 0x01;
assert(dsp == resultdsp);
assert(ach == resulth);
assert(acl == resultl);
ach = 0;
acl = 0;
rs = 0xC0000000;
rt = 0x7FFFFFFF;
resulth = 0xC0000000;
resultl = 0x80000000;
resultdsp = 0;
__asm
("wrdsp $0\n\t"
"mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"
"dpaq_sa.l.w $ac1, %3, %4\n\t"
"mfhi %0, $ac1\n\t"
"mflo %1, $ac1\n\t"
"rddsp %2\n\t"
: "+r"(ach), "+r"(acl), "=r"(dsp)
: "r"(rs), "r"(rt)
);
dsp = (dsp >> 17) & 0x01;
assert(dsp == resultdsp);
assert(ach == resulth);
assert(acl == resultl);
ach = 0x20000000;
acl = 0;
rs = 0xE0000000;
rt = 0x7FFFFFFF;
resulth = 0;
resultl = 0x40000000;
resultdsp = 0;
__asm
("wrdsp $0\n\t"
"mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"
"dpaq_sa.l.w $ac1, %3, %4\n\t"
"mfhi %0, $ac1\n\t"
"mflo %1, $ac1\n\t"
"rddsp %2\n\t"
: "+r"(ach), "+r"(acl), "=r"(dsp)
: "r"(rs), "r"(rt)
);
dsp = (dsp >> 17) & 0x01;
assert(dsp == resultdsp);
assert(ach == resulth);
assert(acl == resultl);
return 0;
}