a879306ca1
The sun4m board code connects both of the IRQ outputs of each ESCC to the same slavio input qemu_irq. Connecting two qemu_irqs outputs directly to the same input is not valid as it produces subtly wrong behaviour (for instance if both the IRQ lines are high, and then one goes low, the PIC input will see this as a high-to-low transition even though the second IRQ line should still be holding it high). This kind of wiring needs an explicitly created OR gate; add one. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201219111934.5540-1-mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
30 lines
409 B
Plaintext
30 lines
409 B
Plaintext
config SUN4M
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bool
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imply TCX
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imply CG3
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select CS4231
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select ECCMEMCTL
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select EMPTY_SLOT
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select UNIMP
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select ESCC
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select ESP
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select FDC
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select SLAVIO
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select LANCE
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select M48T59
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select STP2000
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select CHRP_NVRAM
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select OR_IRQ
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config LEON3
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bool
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select GRLIB
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config GRLIB
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bool
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select PTIMER
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config SLAVIO
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bool
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select PTIMER
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