qemu/target/loongarch
Richard Henderson e4fdf9df5b hw/core: Add CPUClass.get_pc
Populate this new method for all targets.  Always match
the result that would be given by cpu_get_tb_cpu_state,
as we will want these values to correspond in the logs.

Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (target/sparc)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
Cc: Eduardo Habkost <eduardo@habkost.net> (supporter:Machine core)
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> (supporter:Machine core)
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org> (reviewer:Machine core)
Cc: Yanan Wang <wangyanan55@huawei.com> (reviewer:Machine core)
Cc: Michael Rolnik <mrolnik@gmail.com> (maintainer:AVR TCG CPUs)
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> (maintainer:CRIS TCG CPUs)
Cc: Taylor Simpson <tsimpson@quicinc.com> (supporter:Hexagon TCG CPUs)
Cc: Song Gao <gaosong@loongson.cn> (maintainer:LoongArch TCG CPUs)
Cc: Xiaojuan Yang <yangxiaojuan@loongson.cn> (maintainer:LoongArch TCG CPUs)
Cc: Laurent Vivier <laurent@vivier.eu> (maintainer:M68K TCG CPUs)
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> (reviewer:MIPS TCG CPUs)
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> (reviewer:MIPS TCG CPUs)
Cc: Chris Wulff <crwulff@gmail.com> (maintainer:NiosII TCG CPUs)
Cc: Marek Vasut <marex@denx.de> (maintainer:NiosII TCG CPUs)
Cc: Stafford Horne <shorne@gmail.com> (odd fixer:OpenRISC TCG CPUs)
Cc: Yoshinori Sato <ysato@users.sourceforge.jp> (reviewer:RENESAS RX CPUs)
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (maintainer:SPARC TCG CPUs)
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (maintainer:TriCore TCG CPUs)
Cc: Max Filippov <jcmvbkbc@gmail.com> (maintainer:Xtensa TCG CPUs)
Cc: qemu-arm@nongnu.org (open list:ARM TCG CPUs)
Cc: qemu-ppc@nongnu.org (open list:PowerPC TCG CPUs)
Cc: qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs)
Cc: qemu-s390x@nongnu.org (open list:S390 TCG CPUs)
2022-10-04 12:13:12 -07:00
..
insn_trans target/loongarch: Remove cpu_fcsr0 2022-08-08 19:42:53 -07:00
constant_timer.c target/loongarch: Add constant timer support 2022-06-06 18:09:03 +00:00
cpu-csr.h target/loongarch: Add CSRs definition 2022-06-06 18:09:03 +00:00
cpu-param.h target/loongarch: Add MMU support for LoongArch CPU. 2022-06-06 18:09:03 +00:00
cpu.c hw/core: Add CPUClass.get_pc 2022-10-04 12:13:12 -07:00
cpu.h target/loongarch: Fix macros SET_FPU_* in cpu.h 2022-08-05 08:18:30 -07:00
csr_helper.c target/loongarch: Add lock when writing timer clear reg 2022-07-04 11:08:58 +05:30
disas.c target/loongarch: Add timer related instructions support. 2022-06-06 18:09:03 +00:00
fpu_helper.c target/loongarch: Remove cpu_fcsr0 2022-08-08 19:42:53 -07:00
gdbstub.c target/loongarch: Update gdb_set_fpu() and gdb_get_fpu() 2022-08-05 10:02:40 -07:00
helper.h target/loongarch: Remove cpu_fcsr0 2022-08-08 19:42:53 -07:00
insns.decode target/loongarch: Add timer related instructions support. 2022-06-06 18:09:03 +00:00
internals.h target/loongarch: Update gdb_set_fpu() and gdb_get_fpu() 2022-08-05 10:02:40 -07:00
iocsr_helper.c target/loongarch: Add LoongArch IOCSR instruction 2022-06-06 18:09:03 +00:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
machine.c target/loongarch: Add MMU support for LoongArch CPU. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add gdb support. 2022-06-06 18:14:13 +00:00
op_helper.c target/loongarch/op_helper: Fix coverity cond_at_most error 2022-07-19 21:53:58 +05:30
README docs/system/loongarch: Update the LoongArch document 2022-08-13 04:45:03 -07:00
tlb_helper.c target/loongarch/tlb_helper: Fix coverity integer overflow error 2022-07-19 21:53:58 +05:30
translate.c accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
translate.h target/loongarch: Add fixed point arithmetic instruction translation 2022-06-06 18:09:03 +00:00

- Introduction

  LoongArch is the general processor architecture of Loongson.

  The following versions of the LoongArch core are supported
    core: 3A5000
    https://github.com/loongson/LoongArch-Documentation/releases/download/2021.08.17/LoongArch-Vol1-v1.00-EN.pdf

  We can get the latest loongarch documents at https://github.com/loongson/LoongArch-Documentation/tags.


- System emulation

  You can reference docs/system/loongarch/loongson3.rst to get the information about system emulation of LoongArch.

- Linux-user emulation

  We already support Linux user emulation. We can use LoongArch cross-tools to build LoongArch executables on X86 machines,
  and We can also use qemu-loongarch64 to run LoongArch executables.

  1. Config cross-tools env.

     see System emulation.

  2. Test tests/tcg/multiarch.

     ./configure  --static  --prefix=/usr  --disable-werror --target-list="loongarch64-linux-user" --enable-debug

     cd build

     make && make check-tcg

  3. Run LoongArch system basic command with loongarch-clfs-system.

     - Config clfs env.

       wget https://github.com/loongson/build-tools/releases/download/2022.05.29/loongarch64-clfs-system-5.0.tar.bz2

       tar -vxf loongarch64-clfs-system-5.0.tar.bz2 -C /opt/clfs

       cp /opt/clfs/lib64/ld-linux-loongarch-lp64d.so.1  /lib64

       export LD_LIBRARY_PATH="/opt/clfs/lib64"

     - Run LoongArch system basic command.

       ./qemu-loongarch64  /opt/clfs/usr/bin/bash
       ./qemu-loongarch64  /opt/clfs/usr/bin/ls
       ./qemu-loongarch64  /opt/clfs/usr/bin/pwd

- Note.
  We can get the latest LoongArch documents or LoongArch tools at https://github.com/loongson/