7a5235c9e6
Since HAX_VM_IOCTL_ALLOC_RAM takes a 32-bit size, it cannot handle RAM blocks of 4GB or larger, which is why HAXM can only run guests with less than 4GB of RAM. Solve this problem by utilizing the new HAXM API, HAX_VM_IOCTL_ADD_RAMBLOCK, which takes a 64-bit size, to register RAM blocks with the HAXM kernel module. The new API is first added in HAXM 7.0.0, and its availablility and be confirmed by the presence of the HAX_CAP_64BIT_RAMBLOCK capability flag. When the guest RAM size reaches 7GB, QEMU will ask HAXM to set up a memory mapping that covers a 4GB region, which will fail, because HAX_VM_IOCTL_SET_RAM also takes a 32-bit size. Work around this limitation by splitting the large mapping into small ones and calling HAX_VM_IOCTL_SET_RAM multiple times. Bug: https://bugs.launchpad.net/qemu/+bug/1735576 Signed-off-by: Yu Ning <yu.ning@intel.com> Message-Id: <1515752555-12784-1-git-send-email-yu.ning@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
62 lines
1.9 KiB
C
62 lines
1.9 KiB
C
/*
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* QEMU HAXM support
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*
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* Copyright (c) 2011 Intel Corporation
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* Written by:
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* Jiang Yunhong<yunhong.jiang@intel.com>
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* Xin Xiaohui<xiaohui.xin@intel.com>
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* Zhang Xiantao<xiantao.zhang@intel.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#ifndef TARGET_I386_HAX_DARWIN_H
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#define TARGET_I386_HAX_DARWIN_H
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#include <sys/ioctl.h>
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#define HAX_INVALID_FD (-1)
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static inline int hax_invalid_fd(hax_fd fd)
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{
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return fd <= 0;
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}
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static inline void hax_mod_close(struct hax_state *hax)
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{
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close(hax->fd);
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}
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static inline void hax_close_fd(hax_fd fd)
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{
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close(fd);
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}
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/* HAX model level ioctl */
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#define HAX_IOCTL_VERSION _IOWR(0, 0x20, struct hax_module_version)
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#define HAX_IOCTL_CREATE_VM _IOWR(0, 0x21, uint32_t)
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#define HAX_IOCTL_DESTROY_VM _IOW(0, 0x22, uint32_t)
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#define HAX_IOCTL_CAPABILITY _IOR(0, 0x23, struct hax_capabilityinfo)
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#define HAX_VM_IOCTL_VCPU_CREATE _IOWR(0, 0x80, uint32_t)
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#define HAX_VM_IOCTL_ALLOC_RAM _IOWR(0, 0x81, struct hax_alloc_ram_info)
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#define HAX_VM_IOCTL_SET_RAM _IOWR(0, 0x82, struct hax_set_ram_info)
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#define HAX_VM_IOCTL_VCPU_DESTROY _IOW(0, 0x83, uint32_t)
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#define HAX_VM_IOCTL_NOTIFY_QEMU_VERSION _IOW(0, 0x84, struct hax_qemu_version)
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#define HAX_VM_IOCTL_ADD_RAMBLOCK _IOW(0, 0x85, struct hax_ramblock_info)
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#define HAX_VCPU_IOCTL_RUN _IO(0, 0xc0)
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#define HAX_VCPU_IOCTL_SET_MSRS _IOWR(0, 0xc1, struct hax_msr_data)
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#define HAX_VCPU_IOCTL_GET_MSRS _IOWR(0, 0xc2, struct hax_msr_data)
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#define HAX_VCPU_IOCTL_SET_FPU _IOW(0, 0xc3, struct fx_layout)
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#define HAX_VCPU_IOCTL_GET_FPU _IOR(0, 0xc4, struct fx_layout)
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#define HAX_VCPU_IOCTL_SETUP_TUNNEL _IOWR(0, 0xc5, struct hax_tunnel_info)
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#define HAX_VCPU_IOCTL_INTERRUPT _IOWR(0, 0xc6, uint32_t)
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#define HAX_VCPU_SET_REGS _IOWR(0, 0xc7, struct vcpu_state_t)
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#define HAX_VCPU_GET_REGS _IOWR(0, 0xc8, struct vcpu_state_t)
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#endif /* TARGET_I386_HAX_DARWIN_H */
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