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Peter Maydell b0f9690e78 code cleanup, switch to transaction_failed hook 
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Merge remote-tracking branch 'remotes/vivier/tags/m68k-staging-pull-request' into staging

code cleanup, switch to transaction_failed hook

# gpg: Signature made Thu 16 May 2019 23:33:00 BST
# gpg:                using RSA key F30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-staging-pull-request:
  target/m68k: Optimize rotate_x() using extract_i32()
  target/m68k: Fix a tcg_temp leak
  target/m68k: Reduce the l1 TCGLabel scope
  target/m68k: Switch to transaction_failed hook
  target/m68k: In get_physical_address() check for memory access failures
  target/m68k: In dump_address_map() check for memory access failures

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	target/m68k/cpu.h
2019-05-17 10:28:23 +01:00
..
alpha tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
arm Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
cris Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
hppa tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
i386 Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
lm32 tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
m68k code cleanup, switch to transaction_failed hook 2019-05-17 10:28:23 +01:00
microblaze tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
mips tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
moxie tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
nios2 Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
openrisc tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
ppc Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
riscv Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
s390x Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
sh4 tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
sparc Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
tilegx target/tilegx: Convert to CPUClass::tlb_fill 2019-05-10 11:12:50 -07:00
tricore Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
unicore32 tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
xtensa Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00