qemu/target
Philipp Tomsich e47fb6c1e9 target/riscv: fix clzw implementation to operate on arg1
The refactored gen_clzw() uses ret as its argument, instead of arg1.
Fix it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210911140016.834071-3-philipp.tomsich@vrull.eu
Fixes: 6090391505 ("target/riscv: Add DisasExtend to gen_unary")
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-10-07 08:32:39 +10:00
..
alpha hw/core: Make do_unaligned_access noreturn 2021-09-21 19:36:44 -07:00
arm tcg: Rename TCGMemOpIdx to MemOpIdx 2021-10-05 16:53:17 -07:00
avr include/exec: Move cpu_signal_handler declaration 2021-09-21 19:36:44 -07:00
cris include/exec: Move cpu_signal_handler declaration 2021-09-21 19:36:44 -07:00
hexagon target/hexagon: Use tcg_constant_* 2021-10-06 10:29:56 -05:00
hppa hw/core: Make do_unaligned_access noreturn 2021-09-21 19:36:44 -07:00
i386 tcg: Rename TCGMemOpIdx to MemOpIdx 2021-10-05 16:53:17 -07:00
m68k tcg: Rename TCGMemOpIdx to MemOpIdx 2021-10-05 16:53:17 -07:00
microblaze hw/core: Make do_unaligned_access noreturn 2021-09-21 19:36:44 -07:00
mips tcg: Rename TCGMemOpIdx to MemOpIdx 2021-10-05 16:53:17 -07:00
nios2 hw/core: Make do_unaligned_access noreturn 2021-09-21 19:36:44 -07:00
openrisc include/exec: Move cpu_signal_handler declaration 2021-09-21 19:36:44 -07:00
ppc target/ppc: Check privilege level based on PSR and LPCR[HR] in tlbie[l] 2021-09-30 12:26:06 +10:00
riscv target/riscv: fix clzw implementation to operate on arg1 2021-10-07 08:32:39 +10:00
rx include/exec: Move cpu_signal_handler declaration 2021-09-21 19:36:44 -07:00
s390x tcg: Rename TCGMemOpIdx to MemOpIdx 2021-10-05 16:53:17 -07:00
sh4 target/sh4: Use lookup_symbol in sh4_tr_disas_log 2021-10-04 09:47:26 +02:00
sparc tcg: Rename TCGMemOpIdx to MemOpIdx 2021-10-05 16:53:17 -07:00
tricore include/exec: Move cpu_signal_handler declaration 2021-09-21 19:36:44 -07:00
xtensa target/xtensa: list cores in a text file 2021-10-05 13:10:29 +02:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build