9746e583fe
The RISC-V AIA (Advanced Interrupt Architecture) defines a new interrupt controller for MSIs (message signal interrupts) called IMSIC (Incoming Message Signal Interrupt Controller). The IMSIC is per-HART device and also suppport virtualizaiton of MSIs using dedicated VS-level guest interrupt files. This patch adds device emulation for RISC-V AIA IMSIC which supports M-level, S-level, and VS-level MSIs. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Frank Chang <frank.chang@sifive.com> Message-Id: <20220220085526.808674-3-anup@brainfault.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
87 lines
933 B
Plaintext
87 lines
933 B
Plaintext
config HEATHROW_PIC
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bool
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config I8259
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bool
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select ISA_BUS
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config PL190
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bool
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config IOAPIC
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bool
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select I8259
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config ARM_GIC
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bool
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select MSI_NONBROKEN
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config OPENPIC
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bool
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select MSI_NONBROKEN
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config APIC
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bool
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select MSI_NONBROKEN
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select I8259
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config ARM_GIC_TCG
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bool
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default y
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depends on ARM_GIC && TCG
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config ARM_GIC_KVM
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bool
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default y
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depends on ARM_GIC && KVM
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config XICS
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bool
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config XIVE
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bool
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config ALLWINNER_A10_PIC
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bool
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config S390_FLIC
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bool
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config S390_FLIC_KVM
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bool
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default y
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depends on S390_FLIC && KVM
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config OMPIC
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bool
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config PPC_UIC
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bool
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config SH_INTC
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bool
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config RX_ICU
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bool
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config LOONGSON_LIOINTC
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bool
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config RISCV_ACLINT
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bool
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config RISCV_APLIC
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bool
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config RISCV_IMSIC
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bool
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config SIFIVE_PLIC
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bool
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config GOLDFISH_PIC
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bool
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config M68K_IRQC
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bool
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