qemu/target/i386/hvf
Peter Maydell 9740b907a5 target-arm queue:
* cleanups of qemu_oom_check() and qemu_memalign()
  * target/arm/translate-neon: UNDEF if VLD1/VST1 stride bits are non-zero
  * target/arm/translate-neon: Simplify align field check for VLD3
  * GICv3 ITS: add more trace events
  * GICv3 ITS: implement 8-byte accesses properly
  * GICv3: fix minor issues with some trace/log messages
  * ui/cocoa: Use the standard about panel
  * target/arm: Provide cpu property for controling FEAT_LPA2
  * hw/arm/virt: Disable LPA2 for -machine virt-6.2
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20220307' into staging

target-arm queue:
 * cleanups of qemu_oom_check() and qemu_memalign()
 * target/arm/translate-neon: UNDEF if VLD1/VST1 stride bits are non-zero
 * target/arm/translate-neon: Simplify align field check for VLD3
 * GICv3 ITS: add more trace events
 * GICv3 ITS: implement 8-byte accesses properly
 * GICv3: fix minor issues with some trace/log messages
 * ui/cocoa: Use the standard about panel
 * target/arm: Provide cpu property for controling FEAT_LPA2
 * hw/arm/virt: Disable LPA2 for -machine virt-6.2

# gpg: Signature made Mon 07 Mar 2022 16:46:06 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20220307:
  hw/arm/virt: Disable LPA2 for -machine virt-6.2
  target/arm: Provide cpu property for controling FEAT_LPA2
  ui/cocoa: Use the standard about panel
  hw/intc/arm_gicv3_cpuif: Fix register names in ICV_HPPIR read trace event
  hw/intc/arm_gicv3: Fix missing spaces in error log messages
  hw/intc/arm_gicv3: Specify valid and impl in MemoryRegionOps
  hw/intc/arm_gicv3_its: Add trace events for table reads and writes
  hw/intc/arm_gicv3_its: Add trace events for commands
  target/arm/translate-neon: Simplify align field check for VLD3
  target/arm/translate-neon: UNDEF if VLD1/VST1 stride bits are non-zero
  osdep: Move memalign-related functions to their own header
  util: Put qemu_vfree() in memalign.c
  util: Use meson checks for valloc() and memalign() presence
  util: Share qemu_try_memalign() implementation between POSIX and Windows
  meson.build: Don't misdetect posix_memalign() on Windows
  util: Return valid allocation for qemu_try_memalign() with zero size
  util: Unify implementations of qemu_memalign()
  util: Make qemu_oom_check() a static function

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-08 15:26:10 +00:00
..
hvf-cpu.c target/i386: Populate x86_ext_save_areas offsets using cpuid where possible 2021-07-06 08:33:48 +02:00
hvf-i386.h hvf: Move hvf internal definitions into common header 2021-06-03 16:43:26 +01:00
hvf.c osdep: Move memalign-related functions to their own header 2022-03-07 13:16:49 +00:00
meson.build hvf: Move vcpu thread functions into common directory 2021-06-03 16:43:26 +01:00
panic.h x86 hvf cpus: Fix Lesser GPL version number 2020-11-15 16:45:27 +01:00
README.md i386: Compile CPUX86State xsave_buf only when support KVM or HVF 2018-10-02 19:09:12 +02:00
vmcs.h Clean up ill-advised or unusual header guards 2019-05-13 08:58:55 +02:00
vmx.h hvf: Introduce hvf vcpu struct 2021-06-03 16:43:27 +01:00
x86_cpuid.c hvf: Guard xgetbv call 2021-02-16 17:15:39 +01:00
x86_decode.c x86 hvf cpus: Fix Lesser GPL version number 2020-11-15 16:45:27 +01:00
x86_decode.h x86 hvf cpus: Fix Lesser GPL version number 2020-11-15 16:45:27 +01:00
x86_descr.c hvf: Introduce hvf vcpu struct 2021-06-03 16:43:27 +01:00
x86_descr.h x86 hvf cpus: Fix Lesser GPL version number 2020-11-15 16:45:27 +01:00
x86_emu.c target: Use forward declared type instead of structure type 2022-03-06 22:22:40 +01:00
x86_emu.h target: Use forward declared type instead of structure type 2022-03-06 22:22:40 +01:00
x86_flags.c x86 hvf cpus: Fix Lesser GPL version number 2020-11-15 16:45:27 +01:00
x86_flags.h x86 hvf cpus: Fix Lesser GPL version number 2020-11-15 16:45:27 +01:00
x86_mmu.c hvf: Introduce hvf vcpu struct 2021-06-03 16:43:27 +01:00
x86_mmu.h x86 hvf cpus: Fix Lesser GPL version number 2020-11-15 16:45:27 +01:00
x86_task.c hvf: Introduce hvf vcpu struct 2021-06-03 16:43:27 +01:00
x86_task.h Clean up header guards that don't match their file name 2019-05-13 08:58:55 +02:00
x86.c hvf: Introduce hvf vcpu struct 2021-06-03 16:43:27 +01:00
x86.h hvf: Fix segment selector format 2020-11-18 09:32:17 +01:00
x86hvf.c target/i386: Pass buffer and length to XSAVE helper 2021-07-06 07:54:53 +02:00
x86hvf.h hvf: Move cpu functions into common directory 2021-06-03 16:43:26 +01:00

OS X Hypervisor.framework support in QEMU

These sources (and ../hvf-all.c) are adapted from Veertu Inc's vdhh (Veertu Desktop Hosted Hypervisor) (last known location: https://github.com/veertuinc/vdhh) with some minor changes, the most significant of which were:

  1. Adapt to our current QEMU's CPUState structure and address_space_rw API; many struct members have been moved around (emulated x86 state, xsave_buf) due to historical differences + QEMU needing to handle more emulation targets.
  2. Removal of apic_page and hyperv-related functionality.
  3. More relaxed use of qemu_mutex_lock_iothread.