qemu/target-arm
Peter Maydell e167adc9d9 target-arm: A64: Fix handling of rotate in logic_imm_decode_wmask
The code in logic_imm_decode_wmask attempts to rotate a mask
value within the bottom 'e' bits of the value with
    mask = (mask >> r) | (mask << (e - r));
This has two issues:
 * if the element size is 64 then a rotate by zero results
   in a shift left by 64, which is undefined behaviour
 * if the element size is smaller than 64 then this will
   leave junk in the value at bit 'e' and above, which is
   not valid input to bitfield_replicate(). As it happens,
   the bits at bit 'e' to '2e - r' are exactly the ones
   which bitfield_replicate is going to copy in there,
   so this isn't a "wrong code generated" bug, but it's
   confusing and if we ever put an assert in
   bitfield_replicate it would fire on valid guest code.

Fix the former by not doing anything if r is zero, and
the latter by masking with bitmask64(e).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1423233250-15853-3-git-send-email-peter.maydell@linaro.org
2015-02-13 05:46:09 +00:00
..
arm_ldst.h softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
arm-semi.c Pass semihosting exit code back to system. 2014-12-11 12:07:48 +00:00
cpu64.c target-arm: Add CPU property to disable AArch64 2015-02-13 05:46:08 +00:00
cpu-qom.h target-arm: Add ARMCPU secure property 2014-12-22 23:12:28 +00:00
cpu.c target-arm: Add CPU property to disable AArch64 2015-02-13 05:46:08 +00:00
cpu.h target-arm: Add 32/64-bit register sync 2015-02-13 05:46:08 +00:00
crypto_helper.c target-arm: crypto: fix BE host support 2015-01-16 11:54:29 +00:00
gdbstub64.c target-arm/gdbstub64.c: remove useless 'break' statement. 2014-04-17 21:34:06 +01:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
helper-a64.c target-arm: Add 32/64-bit register sync 2015-02-13 05:46:08 +00:00
helper-a64.h target-arm: A64: Implement CRC instructions 2014-06-09 16:06:12 +01:00
helper.c target-arm: Add 32/64-bit register sync 2015-02-13 05:46:08 +00:00
helper.h target-arm: A64: Emulate the SMC insn 2014-09-29 18:48:50 +01:00
internals.h target-arm: make TTBCR banked 2014-12-11 12:07:51 +00:00
iwmmxt_helper.c target-arm: Delete unused iwmmxt_msadb helper 2014-06-09 16:06:12 +01:00
kvm32.c target-arm/kvm: make reg sync code common between kvm32/64 2014-12-11 12:07:53 +00:00
kvm64.c target-arm: Add AArch32 guest support to KVM64 2015-02-13 05:46:08 +00:00
kvm_arm.h target-arm/kvm: make reg sync code common between kvm32/64 2014-12-11 12:07:53 +00:00
kvm-consts.h target-arm: add missing PSCI constants needed for PSCI emulation 2014-10-24 12:19:12 +01:00
kvm-stub.c target-arm: Initialize cpreg list from KVM when using KVM 2013-06-25 18:16:10 +01:00
kvm.c kvm: extend kvm_irqchip_add_msi_route to work on s390 2015-01-12 10:14:04 +01:00
machine.c vmstate: accept QEMUTimer in VMSTATE_TIMER*, add VMSTATE_TIMER_PTR* 2015-01-26 12:22:44 +01:00
Makefile.objs target-arm: add emulation of PSCI calls for system emulation 2014-10-24 12:19:13 +01:00
neon_helper.c target-arm: add support for v8 VMULL.P64 instruction 2014-06-09 16:06:11 +01:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c target-arm: Add 32/64-bit register sync 2015-02-13 05:46:08 +00:00
psci.c target-arm: add emulation of PSCI calls for system emulation 2014-10-24 12:19:13 +01:00
translate-a64.c target-arm: A64: Fix handling of rotate in logic_imm_decode_wmask 2015-02-13 05:46:09 +00:00
translate.c target-arm: Use correct mmu_idx for unprivileged loads and stores 2015-02-05 13:37:23 +00:00
translate.h target-arm: Define correct mmu_idx values and pass them in TB flags 2015-02-05 13:37:23 +00:00