Richard Henderson 2899062614 accel/tcg: Add cpu_ld*_code_mmu ... At least RISC-V has the need to be able to perform a read using execute permissions, outside of translation. Add helpers to facilitate this. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230325105429.1142530-9-richard.henderson@linaro.org> Message-Id: <20230412114333.118895-9-richard.henderson@linaro.org>		2023-05-02 13:05:45 -07:00
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hvf
kvm	kvm: dirty-ring: Fix race with vcpu creation	2023-04-04 18:46:46 +02:00
qtest	accel/qtest: Support qtest accelerator for Windows	2022-10-28 11:17:12 +02:00
stubs	includes: move tb_flush into its own header	2023-03-07 17:06:33 +00:00
tcg	accel/tcg: Add cpu_ld*_code_mmu	2023-05-02 13:05:45 -07:00
xen	accel/xen: Fix DM state change notification in dm_restrict mode	2023-03-23 09:56:54 +00:00
accel-blocker.c	accel: introduce accelerator blocker API	2023-01-11 09:59:39 +01:00
accel-common.c
accel-softmmu.c	*: Add missing includes of qemu/error-report.h	2023-03-22 15:06:57 +00:00
accel-softmmu.h
accel-user.c
dummy-cpus.c	accel/qtest: Support qtest accelerator for Windows	2022-10-28 11:17:12 +02:00
Kconfig
meson.build	accel: introduce accelerator blocker API	2023-01-11 09:59:39 +01:00