9e1a30d342
This new abstract type will be used to differentiate between static and
non-static CPUs in query-cpu-definitions.
All generic CPUs were changed to be of this type. Named CPUs are kept as
TYPE_RISCV_CPU and will still be considered static.
This is the output of query-cpu-definitions after this change for the
riscv64 target:
$ ./build/qemu-system-riscv64 -S -M virt -display none -qmp stdio
{"QMP": {"version": (...)}
{"execute": "qmp_capabilities", "arguments": {"enable": ["oob"]}}
{"return": {}}
{"execute": "query-cpu-definitions"}
{"return": [
{"name": "rv64", "typename": "rv64-riscv-cpu", "static": false, "deprecated": false},
{"name": "sifive-e51", "typename": "sifive-e51-riscv-cpu", "static": true, "deprecated": false},
{"name": "any", "typename": "any-riscv-cpu", "static": false, "deprecated": false},
{"name": "x-rv128", "typename": "x-rv128-riscv-cpu", "static": false, "deprecated": false},
{"name": "shakti-c", "typename": "shakti-c-riscv-cpu", "static": true, "deprecated": false},
{"name": "thead-c906", "typename": "thead-c906-riscv-cpu", "static": true, "deprecated": false},
{"name": "sifive-u54", "typename": "sifive-u54-riscv-cpu", "static": true, "deprecated": false}
]}
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230411183511.189632-4-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
58 lines
2.1 KiB
C
58 lines
2.1 KiB
C
/*
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* QEMU CPU QMP commands for RISC-V
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*
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* Copyright (c) 2023 Ventana Micro Systems Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/qapi-commands-machine-target.h"
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#include "cpu-qom.h"
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static void riscv_cpu_add_definition(gpointer data, gpointer user_data)
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{
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ObjectClass *oc = data;
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CpuDefinitionInfoList **cpu_list = user_data;
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CpuDefinitionInfo *info = g_malloc0(sizeof(*info));
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const char *typename = object_class_get_name(oc);
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ObjectClass *dyn_class;
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info->name = g_strndup(typename,
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strlen(typename) - strlen("-" TYPE_RISCV_CPU));
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info->q_typename = g_strdup(typename);
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dyn_class = object_class_dynamic_cast(oc, TYPE_RISCV_DYNAMIC_CPU);
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info->q_static = dyn_class == NULL;
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QAPI_LIST_PREPEND(*cpu_list, info);
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}
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CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
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{
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CpuDefinitionInfoList *cpu_list = NULL;
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GSList *list = object_class_get_list(TYPE_RISCV_CPU, false);
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g_slist_foreach(list, riscv_cpu_add_definition, &cpu_list);
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g_slist_free(list);
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return cpu_list;
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}
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