0d0b91a804
The following instructions are added
L2_loadbzw2_io Rd32 = memubh(Rs32+#s11:1)
L2_loadbzw4_io Rdd32 = memubh(Rs32+#s11:1)
L2_loadbsw2_io Rd32 = membh(Rs32+#s11:1)
L2_loadbsw4_io Rdd32 = membh(Rs32+#s11:1)
L4_loadbzw2_ur Rd32 = memubh(Rt32<<#u2+#U6)
L4_loadbzw4_ur Rdd32 = memubh(Rt32<<#u2+#U6)
L4_loadbsw2_ur Rd32 = membh(Rt32<<#u2+#U6)
L4_loadbsw4_ur Rdd32 = membh(Rt32<<#u2+#U6)
L4_loadbzw2_ap Rd32 = memubh(Re32=#U6)
L4_loadbzw4_ap Rdd32 = memubh(Re32=#U6)
L4_loadbsw2_ap Rd32 = membh(Re32=#U6)
L4_loadbsw4_ap Rdd32 = membh(Re32=#U6)
L2_loadbzw2_pr Rd32 = memubh(Rx32++Mu2)
L2_loadbzw4_pr Rdd32 = memubh(Rx32++Mu2)
L2_loadbsw2_pr Rd32 = membh(Rx32++Mu2)
L2_loadbsw4_pr Rdd32 = membh(Rx32++Mu2)
L2_loadbzw2_pbr Rd32 = memubh(Rx32++Mu2:brev)
L2_loadbzw4_pbr Rdd32 = memubh(Rx32++Mu2:brev)
L2_loadbsw2_pbr Rd32 = membh(Rx32++Mu2:brev)
L2_loadbsw4_pbr Rdd32 = membh(Rx32++Mu2:brev)
L2_loadbzw2_pi Rd32 = memubh(Rx32++#s4:1)
L2_loadbzw4_pi Rdd32 = memubh(Rx32++#s4:1)
L2_loadbsw2_pi Rd32 = membh(Rx32++#s4:1)
L2_loadbsw4_pi Rdd32 = membh(Rx32++#s4:1)
L2_loadbzw2_pci Rd32 = memubh(Rx32++#s4:1:circ(Mu2))
L2_loadbzw4_pci Rdd32 = memubh(Rx32++#s4:1:circ(Mu2))
L2_loadbsw2_pci Rd32 = membh(Rx32++#s4:1:circ(Mu2))
L2_loadbsw4_pci Rdd32 = membh(Rx32++#s4:1:circ(Mu2))
L2_loadbzw2_pcr Rd32 = memubh(Rx32++I:circ(Mu2))
L2_loadbzw4_pcr Rdd32 = memubh(Rx32++I:circ(Mu2))
L2_loadbsw2_pcr Rd32 = membh(Rx32++I:circ(Mu2))
L2_loadbsw4_pcr Rdd32 = membh(Rx32++I:circ(Mu2))
Test cases in tests/tcg/hexagon/load_unpack.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-25-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
475 lines
16 KiB
C
475 lines
16 KiB
C
/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Test load unpack instructions
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*
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* Example
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* r0 = memubh(r1+#0)
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* loads a half word from memory and zero-extends the 2 bytes to form a word
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*
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* For each addressing mode, there are 4 tests
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* bzw2 unsigned 2 elements
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* bsw2 signed 2 elements
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* bzw4 unsigned 4 elements
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* bsw4 signed 4 elements
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* There are 8 addressing modes, for a total of 32 instructions to test
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*/
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#include <stdio.h>
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#include <string.h>
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int err;
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char buf[16] __attribute__((aligned(1 << 16)));
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void init_buf(void)
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{
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int i;
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for (i = 0; i < 16; i++) {
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int sign = i % 2 == 0 ? 0x80 : 0;
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buf[i] = sign | (i + 1);
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}
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}
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void __check(int line, long long result, long long expect)
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{
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if (result != expect) {
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printf("ERROR at line %d: 0x%08llx != 0x%08llx\n",
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line, result, expect);
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err++;
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}
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}
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#define check(RES, EXP) __check(__LINE__, RES, EXP)
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void __checkp(int line, void *p, void *expect)
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{
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if (p != expect) {
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printf("ERROR at line %d: 0x%p != 0x%p\n", line, p, expect);
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err++;
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}
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}
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#define checkp(RES, EXP) __checkp(__LINE__, RES, EXP)
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/*
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****************************************************************************
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* _io addressing mode (addr + offset)
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*/
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#define BxW_LOAD_io(SZ, RES, ADDR, OFF) \
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__asm__( \
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"%0 = mem" #SZ "(%1+#" #OFF ")\n\t" \
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: "=r"(RES) \
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: "r"(ADDR))
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#define BxW_LOAD_io_Z(RES, ADDR, OFF) \
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BxW_LOAD_io(ubh, RES, ADDR, OFF)
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#define BxW_LOAD_io_S(RES, ADDR, OFF) \
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BxW_LOAD_io(bh, RES, ADDR, OFF)
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#define TEST_io(NAME, TYPE, SIGN, SIZE, EXT, EXP1, EXP2, EXP3, EXP4) \
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void test_##NAME(void) \
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{ \
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TYPE result; \
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init_buf(); \
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BxW_LOAD_io_##SIGN(result, buf, 0 * (SIZE)); \
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check(result, (EXP1) | (EXT)); \
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BxW_LOAD_io_##SIGN(result, buf, 1 * (SIZE)); \
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check(result, (EXP2) | (EXT)); \
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BxW_LOAD_io_##SIGN(result, buf, 2 * (SIZE)); \
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check(result, (EXP3) | (EXT)); \
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BxW_LOAD_io_##SIGN(result, buf, 3 * (SIZE)); \
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check(result, (EXP4) | (EXT)); \
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}
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TEST_io(loadbzw2_io, int, Z, 2, 0x00000000,
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0x00020081, 0x00040083, 0x00060085, 0x00080087)
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TEST_io(loadbsw2_io, int, S, 2, 0x0000ff00,
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0x00020081, 0x00040083, 0x00060085, 0x00080087)
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TEST_io(loadbzw4_io, long long, Z, 4, 0x0000000000000000LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x000c008b000a0089LL, 0x0010008f000e008dLL)
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TEST_io(loadbsw4_io, long long, S, 4, 0x0000ff000000ff00LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x000c008b000a0089LL, 0x0010008f000e008dLL)
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/*
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****************************************************************************
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* _ur addressing mode (index << offset + base)
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*/
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#define BxW_LOAD_ur(SZ, RES, SHIFT, IDX) \
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__asm__( \
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"%0 = mem" #SZ "(%1<<#" #SHIFT " + ##buf)\n\t" \
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: "=r"(RES) \
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: "r"(IDX))
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#define BxW_LOAD_ur_Z(RES, SHIFT, IDX) \
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BxW_LOAD_ur(ubh, RES, SHIFT, IDX)
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#define BxW_LOAD_ur_S(RES, SHIFT, IDX) \
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BxW_LOAD_ur(bh, RES, SHIFT, IDX)
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#define TEST_ur(NAME, TYPE, SIGN, SHIFT, EXT, RES1, RES2, RES3, RES4) \
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void test_##NAME(void) \
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{ \
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TYPE result; \
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init_buf(); \
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BxW_LOAD_ur_##SIGN(result, (SHIFT), 0); \
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check(result, (RES1) | (EXT)); \
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BxW_LOAD_ur_##SIGN(result, (SHIFT), 1); \
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check(result, (RES2) | (EXT)); \
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BxW_LOAD_ur_##SIGN(result, (SHIFT), 2); \
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check(result, (RES3) | (EXT)); \
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BxW_LOAD_ur_##SIGN(result, (SHIFT), 3); \
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check(result, (RES4) | (EXT)); \
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} \
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TEST_ur(loadbzw2_ur, int, Z, 1, 0x00000000,
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0x00020081, 0x00040083, 0x00060085, 0x00080087)
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TEST_ur(loadbsw2_ur, int, S, 1, 0x0000ff00,
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0x00020081, 0x00040083, 0x00060085, 0x00080087)
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TEST_ur(loadbzw4_ur, long long, Z, 2, 0x0000000000000000LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x000c008b000a0089LL, 0x0010008f000e008dLL)
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TEST_ur(loadbsw4_ur, long long, S, 2, 0x0000ff000000ff00LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x000c008b000a0089LL, 0x0010008f000e008dLL)
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/*
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****************************************************************************
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* _ap addressing mode (addr = base)
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*/
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#define BxW_LOAD_ap(SZ, RES, PTR, ADDR) \
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__asm__( \
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"%0 = mem" #SZ "(%1 = ##" #ADDR ")\n\t" \
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: "=r"(RES), "=r"(PTR))
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#define BxW_LOAD_ap_Z(RES, PTR, ADDR) \
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BxW_LOAD_ap(ubh, RES, PTR, ADDR)
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#define BxW_LOAD_ap_S(RES, PTR, ADDR) \
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BxW_LOAD_ap(bh, RES, PTR, ADDR)
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#define TEST_ap(NAME, TYPE, SIGN, SIZE, EXT, RES1, RES2, RES3, RES4) \
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void test_##NAME(void) \
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{ \
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TYPE result; \
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void *ptr; \
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init_buf(); \
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BxW_LOAD_ap_##SIGN(result, ptr, (buf + 0 * (SIZE))); \
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check(result, (RES1) | (EXT)); \
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checkp(ptr, &buf[0 * (SIZE)]); \
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BxW_LOAD_ap_##SIGN(result, ptr, (buf + 1 * (SIZE))); \
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check(result, (RES2) | (EXT)); \
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checkp(ptr, &buf[1 * (SIZE)]); \
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BxW_LOAD_ap_##SIGN(result, ptr, (buf + 2 * (SIZE))); \
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check(result, (RES3) | (EXT)); \
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checkp(ptr, &buf[2 * (SIZE)]); \
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BxW_LOAD_ap_##SIGN(result, ptr, (buf + 3 * (SIZE))); \
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check(result, (RES4) | (EXT)); \
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checkp(ptr, &buf[3 * (SIZE)]); \
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}
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TEST_ap(loadbzw2_ap, int, Z, 2, 0x00000000,
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0x00020081, 0x00040083, 0x00060085, 0x00080087)
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TEST_ap(loadbsw2_ap, int, S, 2, 0x0000ff00,
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0x00020081, 0x00040083, 0x00060085, 0x00080087)
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TEST_ap(loadbzw4_ap, long long, Z, 4, 0x0000000000000000LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x000c008b000a0089LL, 0x0010008f000e008dLL)
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TEST_ap(loadbsw4_ap, long long, S, 4, 0x0000ff000000ff00LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x000c008b000a0089LL, 0x0010008f000e008dLL)
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/*
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****************************************************************************
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* _rp addressing mode (addr ++ modifer-reg)
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*/
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#define BxW_LOAD_pr(SZ, RES, PTR, INC) \
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__asm__( \
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"m0 = %2\n\t" \
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"%0 = mem" #SZ "(%1++m0)\n\t" \
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: "=r"(RES), "+r"(PTR) \
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: "r"(INC) \
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: "m0")
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#define BxW_LOAD_pr_Z(RES, PTR, INC) \
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BxW_LOAD_pr(ubh, RES, PTR, INC)
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#define BxW_LOAD_pr_S(RES, PTR, INC) \
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BxW_LOAD_pr(bh, RES, PTR, INC)
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#define TEST_pr(NAME, TYPE, SIGN, SIZE, EXT, RES1, RES2, RES3, RES4) \
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void test_##NAME(void) \
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{ \
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TYPE result; \
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void *ptr = buf; \
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init_buf(); \
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BxW_LOAD_pr_##SIGN(result, ptr, (SIZE)); \
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check(result, (RES1) | (EXT)); \
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checkp(ptr, &buf[1 * (SIZE)]); \
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BxW_LOAD_pr_##SIGN(result, ptr, (SIZE)); \
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check(result, (RES2) | (EXT)); \
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checkp(ptr, &buf[2 * (SIZE)]); \
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BxW_LOAD_pr_##SIGN(result, ptr, (SIZE)); \
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check(result, (RES3) | (EXT)); \
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checkp(ptr, &buf[3 * (SIZE)]); \
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BxW_LOAD_pr_##SIGN(result, ptr, (SIZE)); \
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check(result, (RES4) | (EXT)); \
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checkp(ptr, &buf[4 * (SIZE)]); \
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}
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TEST_pr(loadbzw2_pr, int, Z, 2, 0x00000000,
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0x00020081, 0x0040083, 0x00060085, 0x00080087)
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TEST_pr(loadbsw2_pr, int, S, 2, 0x0000ff00,
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0x00020081, 0x0040083, 0x00060085, 0x00080087)
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TEST_pr(loadbzw4_pr, long long, Z, 4, 0x0000000000000000LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x000c008b000a0089LL, 0x0010008f000e008dLL)
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TEST_pr(loadbsw4_pr, long long, S, 4, 0x0000ff000000ff00LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x000c008b000a0089LL, 0x0010008f000e008dLL)
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/*
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****************************************************************************
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* _pbr addressing mode (addr ++ modifer-reg:brev)
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*/
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#define BxW_LOAD_pbr(SZ, RES, PTR) \
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__asm__( \
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"r4 = #(1 << (16 - 3))\n\t" \
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"m0 = r4\n\t" \
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"%0 = mem" #SZ "(%1++m0:brev)\n\t" \
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: "=r"(RES), "+r"(PTR) \
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: \
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: "r4", "m0")
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#define BxW_LOAD_pbr_Z(RES, PTR) \
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BxW_LOAD_pbr(ubh, RES, PTR)
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#define BxW_LOAD_pbr_S(RES, PTR) \
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BxW_LOAD_pbr(bh, RES, PTR)
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#define TEST_pbr(NAME, TYPE, SIGN, EXT, RES1, RES2, RES3, RES4) \
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void test_##NAME(void) \
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{ \
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TYPE result; \
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void *ptr = buf; \
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init_buf(); \
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BxW_LOAD_pbr_##SIGN(result, ptr); \
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check(result, (RES1) | (EXT)); \
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BxW_LOAD_pbr_##SIGN(result, ptr); \
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check(result, (RES2) | (EXT)); \
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BxW_LOAD_pbr_##SIGN(result, ptr); \
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check(result, (RES3) | (EXT)); \
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BxW_LOAD_pbr_##SIGN(result, ptr); \
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check(result, (RES4) | (EXT)); \
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}
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TEST_pbr(loadbzw2_pbr, int, Z, 0x00000000,
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0x00020081, 0x00060085, 0x00040083, 0x00080087)
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TEST_pbr(loadbsw2_pbr, int, S, 0x0000ff00,
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0x00020081, 0x00060085, 0x00040083, 0x00080087)
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TEST_pbr(loadbzw4_pbr, long long, Z, 0x0000000000000000LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x0006008500040083LL, 0x000a008900080087LL)
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TEST_pbr(loadbsw4_pbr, long long, S, 0x0000ff000000ff00LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x0006008500040083LL, 0x000a008900080087LL)
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/*
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****************************************************************************
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* _pi addressing mode (addr ++ inc)
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*/
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#define BxW_LOAD_pi(SZ, RES, PTR, INC) \
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__asm__( \
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"%0 = mem" #SZ "(%1++#" #INC ")\n\t" \
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: "=r"(RES), "+r"(PTR))
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#define BxW_LOAD_pi_Z(RES, PTR, INC) \
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BxW_LOAD_pi(ubh, RES, PTR, INC)
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#define BxW_LOAD_pi_S(RES, PTR, INC) \
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BxW_LOAD_pi(bh, RES, PTR, INC)
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#define TEST_pi(NAME, TYPE, SIGN, INC, EXT, RES1, RES2, RES3, RES4) \
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void test_##NAME(void) \
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{ \
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TYPE result; \
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void *ptr = buf; \
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init_buf(); \
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BxW_LOAD_pi_##SIGN(result, ptr, (INC)); \
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check(result, (RES1) | (EXT)); \
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checkp(ptr, &buf[1 * (INC)]); \
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BxW_LOAD_pi_##SIGN(result, ptr, (INC)); \
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check(result, (RES2) | (EXT)); \
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checkp(ptr, &buf[2 * (INC)]); \
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BxW_LOAD_pi_##SIGN(result, ptr, (INC)); \
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check(result, (RES3) | (EXT)); \
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checkp(ptr, &buf[3 * (INC)]); \
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BxW_LOAD_pi_##SIGN(result, ptr, (INC)); \
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check(result, (RES4) | (EXT)); \
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checkp(ptr, &buf[4 * (INC)]); \
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}
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TEST_pi(loadbzw2_pi, int, Z, 2, 0x00000000,
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0x00020081, 0x00040083, 0x00060085, 0x00080087)
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TEST_pi(loadbsw2_pi, int, S, 2, 0x0000ff00,
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0x00020081, 0x00040083, 0x00060085, 0x00080087)
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TEST_pi(loadbzw4_pi, long long, Z, 4, 0x0000000000000000LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x000c008b000a0089LL, 0x0010008f000e008dLL)
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TEST_pi(loadbsw4_pi, long long, S, 4, 0x0000ff000000ff00LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x000c008b000a0089LL, 0x0010008f000e008dLL)
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/*
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****************************************************************************
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* _pci addressing mode (addr ++ inc:circ)
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*/
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#define BxW_LOAD_pci(SZ, RES, PTR, START, LEN, INC) \
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__asm__( \
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"r4 = %3\n\t" \
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"m0 = r4\n\t" \
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"cs0 = %2\n\t" \
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"%0 = mem" #SZ "(%1++#" #INC ":circ(m0))\n\t" \
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: "=r"(RES), "+r"(PTR) \
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: "r"(START), "r"(LEN) \
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: "r4", "m0", "cs0")
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#define BxW_LOAD_pci_Z(RES, PTR, START, LEN, INC) \
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BxW_LOAD_pci(ubh, RES, PTR, START, LEN, INC)
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#define BxW_LOAD_pci_S(RES, PTR, START, LEN, INC) \
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BxW_LOAD_pci(bh, RES, PTR, START, LEN, INC)
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#define TEST_pci(NAME, TYPE, SIGN, LEN, INC, EXT, RES1, RES2, RES3, RES4) \
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void test_##NAME(void) \
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{ \
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TYPE result; \
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void *ptr = buf; \
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init_buf(); \
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BxW_LOAD_pci_##SIGN(result, ptr, buf, (LEN), (INC)); \
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check(result, (RES1) | (EXT)); \
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checkp(ptr, &buf[(1 * (INC)) % (LEN)]); \
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BxW_LOAD_pci_##SIGN(result, ptr, buf, (LEN), (INC)); \
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check(result, (RES2) | (EXT)); \
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checkp(ptr, &buf[(2 * (INC)) % (LEN)]); \
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BxW_LOAD_pci_##SIGN(result, ptr, buf, (LEN), (INC)); \
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check(result, (RES3) | (EXT)); \
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checkp(ptr, &buf[(3 * (INC)) % (LEN)]); \
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BxW_LOAD_pci_##SIGN(result, ptr, buf, (LEN), (INC)); \
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check(result, (RES4) | (EXT)); \
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checkp(ptr, &buf[(4 * (INC)) % (LEN)]); \
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}
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TEST_pci(loadbzw2_pci, int, Z, 6, 2, 0x00000000,
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0x00020081, 0x00040083, 0x00060085, 0x00020081)
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TEST_pci(loadbsw2_pci, int, S, 6, 2, 0x0000ff00,
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0x00020081, 0x00040083, 0x00060085, 0x00020081)
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TEST_pci(loadbzw4_pci, long long, Z, 8, 4, 0x0000000000000000LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x0004008300020081LL, 0x0008008700060085LL)
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TEST_pci(loadbsw4_pci, long long, S, 8, 4, 0x0000ff000000ff00LL,
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0x0004008300020081LL, 0x0008008700060085LL,
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0x0004008300020081LL, 0x0008008700060085LL)
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|
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/*
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****************************************************************************
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* _pcr addressing mode (addr ++ I:circ(modifier-reg))
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*/
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#define BxW_LOAD_pcr(SZ, RES, PTR, START, LEN, INC) \
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__asm__( \
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"r4 = %2\n\t" \
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"m1 = r4\n\t" \
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"cs1 = %3\n\t" \
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"%0 = mem" #SZ "(%1++I:circ(m1))\n\t" \
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: "=r"(RES), "+r"(PTR) \
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: "r"((((INC) & 0x7f) << 17) | ((LEN) & 0x1ffff)), \
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"r"(START) \
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: "r4", "m1", "cs1")
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#define BxW_LOAD_pcr_Z(RES, PTR, START, LEN, INC) \
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BxW_LOAD_pcr(ubh, RES, PTR, START, LEN, INC)
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#define BxW_LOAD_pcr_S(RES, PTR, START, LEN, INC) \
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BxW_LOAD_pcr(bh, RES, PTR, START, LEN, INC)
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|
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#define TEST_pcr(NAME, TYPE, SIGN, SIZE, LEN, INC, \
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EXT, RES1, RES2, RES3, RES4) \
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void test_##NAME(void) \
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|
{ \
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TYPE result; \
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void *ptr = buf; \
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init_buf(); \
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BxW_LOAD_pcr_##SIGN(result, ptr, buf, (LEN), (INC)); \
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check(result, (RES1) | (EXT)); \
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checkp(ptr, &buf[(1 * (INC) * (SIZE)) % (LEN)]); \
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BxW_LOAD_pcr_##SIGN(result, ptr, buf, (LEN), (INC)); \
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check(result, (RES2) | (EXT)); \
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checkp(ptr, &buf[(2 * (INC) * (SIZE)) % (LEN)]); \
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BxW_LOAD_pcr_##SIGN(result, ptr, buf, (LEN), (INC)); \
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check(result, (RES3) | (EXT)); \
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checkp(ptr, &buf[(3 * (INC) * (SIZE)) % (LEN)]); \
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BxW_LOAD_pcr_##SIGN(result, ptr, buf, (LEN), (INC)); \
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check(result, (RES4) | (EXT)); \
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checkp(ptr, &buf[(4 * (INC) * (SIZE)) % (LEN)]); \
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}
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|
|
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TEST_pcr(loadbzw2_pcr, int, Z, 2, 8, 2, 0x00000000,
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|
0x00020081, 0x00060085, 0x00020081, 0x00060085)
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|
TEST_pcr(loadbsw2_pcr, int, S, 2, 8, 2, 0x0000ff00,
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|
0x00020081, 0x00060085, 0x00020081, 0x00060085)
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|
TEST_pcr(loadbzw4_pcr, long long, Z, 4, 8, 1, 0x0000000000000000LL,
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|
0x0004008300020081LL, 0x0008008700060085LL,
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|
0x0004008300020081LL, 0x0008008700060085LL)
|
|
TEST_pcr(loadbsw4_pcr, long long, S, 4, 8, 1, 0x0000ff000000ff00LL,
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|
0x0004008300020081LL, 0x0008008700060085LL,
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|
0x0004008300020081LL, 0x0008008700060085LL)
|
|
|
|
int main()
|
|
{
|
|
test_loadbzw2_io();
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|
test_loadbsw2_io();
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|
test_loadbzw4_io();
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|
test_loadbsw4_io();
|
|
|
|
test_loadbzw2_ur();
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|
test_loadbsw2_ur();
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|
test_loadbzw4_ur();
|
|
test_loadbsw4_ur();
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|
|
|
test_loadbzw2_ap();
|
|
test_loadbsw2_ap();
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|
test_loadbzw4_ap();
|
|
test_loadbsw4_ap();
|
|
|
|
test_loadbzw2_pr();
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|
test_loadbsw2_pr();
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|
test_loadbzw4_pr();
|
|
test_loadbsw4_pr();
|
|
|
|
test_loadbzw2_pbr();
|
|
test_loadbsw2_pbr();
|
|
test_loadbzw4_pbr();
|
|
test_loadbsw4_pbr();
|
|
|
|
test_loadbzw2_pi();
|
|
test_loadbsw2_pi();
|
|
test_loadbzw4_pi();
|
|
test_loadbsw4_pi();
|
|
|
|
test_loadbzw2_pci();
|
|
test_loadbsw2_pci();
|
|
test_loadbzw4_pci();
|
|
test_loadbsw4_pci();
|
|
|
|
test_loadbzw2_pcr();
|
|
test_loadbsw2_pcr();
|
|
test_loadbzw4_pcr();
|
|
test_loadbsw4_pcr();
|
|
|
|
puts(err ? "FAIL" : "PASS");
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|
return err ? 1 : 0;
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|
}
|