qemu/target/ppc/translate
Jose Ricardo Ziviani e04797f79e ppc: Implement bcds. instruction
bcds.: Decimal shift. Given two registers vra and vrb, this instruction
shift the vrb value by vra bits into the result register.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31 10:10:14 +11:00
..
dfp-impl.inc.c
dfp-ops.inc.c
fp-impl.inc.c target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64 2017-01-31 10:10:14 +11:00
fp-ops.inc.c target-ppc: implement stxsd and stxssp 2017-01-31 10:10:12 +11:00
spe-impl.inc.c
spe-ops.inc.c
vmx-impl.inc.c ppc: Implement bcds. instruction 2017-01-31 10:10:14 +11:00
vmx-ops.inc.c ppc: Implement bcds. instruction 2017-01-31 10:10:14 +11:00
vsx-impl.inc.c target-ppc: Add xscvqpdp instruction 2017-01-31 10:10:14 +11:00
vsx-ops.inc.c target-ppc: Add xscvqpdp instruction 2017-01-31 10:10:14 +11:00