3c21c530a3
Definitions of registers and CAN FD frame message box of CTU CAN FD IP core are generated the specification in CACTUS/IP-XACT format. CTU CAN FD IP core repository https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core The location of the CTU CAN IP core specification within IP core design spec/CTU/ip/CAN_FD_IP_Core/2.1/CAN_FD_IP_Core.2.1.xml The header files are generated by pyXact_generator designed by Ondrej Ille which is based on ipyxact_parser. The specification is source of header files for driver and emulation, documentation and VHDL registers map implementation. Signed-off-by: Jan Charvat <charvj10@fel.cvut.cz> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Message-Id: <97ae620f724bf1d76f127aaf628f7aec3af0a11c.1600069689.git.pisa@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
190 lines
5.3 KiB
C
190 lines
5.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*******************************************************************************
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*
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* CTU CAN FD IP Core
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*
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* Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
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* Copyright (C) 2018-2020 Ondrej Ille <ondrej.ille@gmail.com> self-funded
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* Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
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* Copyright (C) 2018-2020 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
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*
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* Project advisors:
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* Jiri Novak <jnovak@fel.cvut.cz>
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* Pavel Pisa <pisa@cmp.felk.cvut.cz>
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*
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* Department of Measurement (http://meas.fel.cvut.cz/)
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* Faculty of Electrical Engineering (http://www.fel.cvut.cz)
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* Czech Technical University (http://www.cvut.cz/)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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******************************************************************************/
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/* This file is autogenerated, DO NOT EDIT! */
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#ifndef __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__
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#define __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__
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/* CAN_Frame_format memory map */
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enum ctu_can_fd_can_frame_format {
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CTU_CAN_FD_FRAME_FORM_W = 0x0,
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CTU_CAN_FD_IDENTIFIER_W = 0x4,
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CTU_CAN_FD_TIMESTAMP_L_W = 0x8,
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CTU_CAN_FD_TIMESTAMP_U_W = 0xc,
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CTU_CAN_FD_DATA_1_4_W = 0x10,
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CTU_CAN_FD_DATA_5_8_W = 0x14,
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CTU_CAN_FD_DATA_61_64_W = 0x4c,
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};
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/* Register descriptions: */
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union ctu_can_fd_frame_form_w {
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uint32_t u32;
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struct ctu_can_fd_frame_form_w_s {
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#ifdef __LITTLE_ENDIAN_BITFIELD
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/* FRAME_FORM_W */
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uint32_t dlc : 4;
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uint32_t reserved_4 : 1;
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uint32_t rtr : 1;
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uint32_t ide : 1;
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uint32_t fdf : 1;
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uint32_t reserved_8 : 1;
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uint32_t brs : 1;
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uint32_t esi_rsv : 1;
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uint32_t rwcnt : 5;
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uint32_t reserved_31_16 : 16;
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#else
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uint32_t reserved_31_16 : 16;
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uint32_t rwcnt : 5;
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uint32_t esi_rsv : 1;
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uint32_t brs : 1;
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uint32_t reserved_8 : 1;
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uint32_t fdf : 1;
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uint32_t ide : 1;
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uint32_t rtr : 1;
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uint32_t reserved_4 : 1;
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uint32_t dlc : 4;
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#endif
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} s;
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};
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enum ctu_can_fd_frame_form_w_rtr {
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NO_RTR_FRAME = 0x0,
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RTR_FRAME = 0x1,
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};
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enum ctu_can_fd_frame_form_w_ide {
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BASE = 0x0,
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EXTENDED = 0x1,
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};
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enum ctu_can_fd_frame_form_w_fdf {
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NORMAL_CAN = 0x0,
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FD_CAN = 0x1,
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};
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enum ctu_can_fd_frame_form_w_brs {
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BR_NO_SHIFT = 0x0,
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BR_SHIFT = 0x1,
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};
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enum ctu_can_fd_frame_form_w_esi_rsv {
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ESI_ERR_ACTIVE = 0x0,
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ESI_ERR_PASIVE = 0x1,
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};
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union ctu_can_fd_identifier_w {
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uint32_t u32;
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struct ctu_can_fd_identifier_w_s {
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#ifdef __LITTLE_ENDIAN_BITFIELD
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/* IDENTIFIER_W */
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uint32_t identifier_ext : 18;
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uint32_t identifier_base : 11;
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uint32_t reserved_31_29 : 3;
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#else
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uint32_t reserved_31_29 : 3;
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uint32_t identifier_base : 11;
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uint32_t identifier_ext : 18;
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#endif
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} s;
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};
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union ctu_can_fd_timestamp_l_w {
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uint32_t u32;
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struct ctu_can_fd_timestamp_l_w_s {
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/* TIMESTAMP_L_W */
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uint32_t time_stamp_31_0 : 32;
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} s;
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};
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union ctu_can_fd_timestamp_u_w {
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uint32_t u32;
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struct ctu_can_fd_timestamp_u_w_s {
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/* TIMESTAMP_U_W */
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uint32_t timestamp_l_w : 32;
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} s;
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};
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union ctu_can_fd_data_1_4_w {
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uint32_t u32;
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struct ctu_can_fd_data_1_4_w_s {
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#ifdef __LITTLE_ENDIAN_BITFIELD
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/* DATA_1_4_W */
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uint32_t data_1 : 8;
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uint32_t data_2 : 8;
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uint32_t data_3 : 8;
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uint32_t data_4 : 8;
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#else
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uint32_t data_4 : 8;
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uint32_t data_3 : 8;
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uint32_t data_2 : 8;
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uint32_t data_1 : 8;
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#endif
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} s;
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};
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union ctu_can_fd_data_5_8_w {
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uint32_t u32;
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struct ctu_can_fd_data_5_8_w_s {
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#ifdef __LITTLE_ENDIAN_BITFIELD
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/* DATA_5_8_W */
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uint32_t data_5 : 8;
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uint32_t data_6 : 8;
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uint32_t data_7 : 8;
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uint32_t data_8 : 8;
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#else
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uint32_t data_8 : 8;
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uint32_t data_7 : 8;
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uint32_t data_6 : 8;
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uint32_t data_5 : 8;
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#endif
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} s;
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};
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union ctu_can_fd_data_61_64_w {
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uint32_t u32;
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struct ctu_can_fd_data_61_64_w_s {
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#ifdef __LITTLE_ENDIAN_BITFIELD
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/* DATA_61_64_W */
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uint32_t data_61 : 8;
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uint32_t data_62 : 8;
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uint32_t data_63 : 8;
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uint32_t data_64 : 8;
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#else
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uint32_t data_64 : 8;
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uint32_t data_63 : 8;
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uint32_t data_62 : 8;
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uint32_t data_61 : 8;
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#endif
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} s;
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};
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#endif
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