fad6cb1a56
The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
1220 lines
25 KiB
C
1220 lines
25 KiB
C
/*
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* Alpha emulation cpu micro-operations helpers for qemu.
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*
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
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*/
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#include "exec.h"
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#include "host-utils.h"
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#include "softfloat.h"
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#include "helper.h"
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void helper_tb_flush (void)
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{
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tlb_flush(env, 1);
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}
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/*****************************************************************************/
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/* Exceptions processing helpers */
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void helper_excp (int excp, int error)
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{
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env->exception_index = excp;
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env->error_code = error;
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cpu_loop_exit();
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}
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uint64_t helper_amask (uint64_t arg)
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{
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switch (env->implver) {
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case IMPLVER_2106x:
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/* EV4, EV45, LCA, LCA45 & EV5 */
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break;
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case IMPLVER_21164:
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case IMPLVER_21264:
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case IMPLVER_21364:
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arg &= ~env->amask;
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break;
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}
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return arg;
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}
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uint64_t helper_load_pcc (void)
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{
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/* XXX: TODO */
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return 0;
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}
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uint64_t helper_load_implver (void)
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{
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return env->implver;
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}
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uint64_t helper_load_fpcr (void)
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{
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uint64_t ret = 0;
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#ifdef CONFIG_SOFTFLOAT
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ret |= env->fp_status.float_exception_flags << 52;
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if (env->fp_status.float_exception_flags)
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ret |= 1ULL << 63;
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env->ipr[IPR_EXC_SUM] &= ~0x3E:
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env->ipr[IPR_EXC_SUM] |= env->fp_status.float_exception_flags << 1;
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#endif
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switch (env->fp_status.float_rounding_mode) {
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case float_round_nearest_even:
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ret |= 2ULL << 58;
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break;
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case float_round_down:
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ret |= 1ULL << 58;
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break;
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case float_round_up:
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ret |= 3ULL << 58;
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break;
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case float_round_to_zero:
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break;
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}
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return ret;
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}
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void helper_store_fpcr (uint64_t val)
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{
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#ifdef CONFIG_SOFTFLOAT
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set_float_exception_flags((val >> 52) & 0x3F, &FP_STATUS);
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#endif
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switch ((val >> 58) & 3) {
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case 0:
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set_float_rounding_mode(float_round_to_zero, &FP_STATUS);
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break;
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case 1:
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set_float_rounding_mode(float_round_down, &FP_STATUS);
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break;
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case 2:
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set_float_rounding_mode(float_round_nearest_even, &FP_STATUS);
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break;
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case 3:
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set_float_rounding_mode(float_round_up, &FP_STATUS);
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break;
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}
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}
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spinlock_t intr_cpu_lock = SPIN_LOCK_UNLOCKED;
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uint64_t helper_rs(void)
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{
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uint64_t tmp;
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spin_lock(&intr_cpu_lock);
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tmp = env->intr_flag;
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env->intr_flag = 1;
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spin_unlock(&intr_cpu_lock);
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return tmp;
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}
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uint64_t helper_rc(void)
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{
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uint64_t tmp;
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spin_lock(&intr_cpu_lock);
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tmp = env->intr_flag;
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env->intr_flag = 0;
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spin_unlock(&intr_cpu_lock);
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return tmp;
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}
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uint64_t helper_addqv (uint64_t op1, uint64_t op2)
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{
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uint64_t tmp = op1;
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op1 += op2;
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if (unlikely((tmp ^ op2 ^ (-1ULL)) & (tmp ^ op1) & (1ULL << 63))) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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return op1;
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}
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uint64_t helper_addlv (uint64_t op1, uint64_t op2)
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{
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uint64_t tmp = op1;
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op1 = (uint32_t)(op1 + op2);
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if (unlikely((tmp ^ op2 ^ (-1UL)) & (tmp ^ op1) & (1UL << 31))) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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return op1;
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}
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uint64_t helper_subqv (uint64_t op1, uint64_t op2)
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{
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uint64_t tmp = op1;
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op1 -= op2;
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if (unlikely(((~tmp) ^ op1 ^ (-1ULL)) & ((~tmp) ^ op2) & (1ULL << 63))) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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return op1;
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}
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uint64_t helper_sublv (uint64_t op1, uint64_t op2)
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{
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uint64_t tmp = op1;
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op1 = (uint32_t)(op1 - op2);
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if (unlikely(((~tmp) ^ op1 ^ (-1UL)) & ((~tmp) ^ op2) & (1UL << 31))) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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return op1;
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}
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uint64_t helper_mullv (uint64_t op1, uint64_t op2)
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{
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int64_t res = (int64_t)op1 * (int64_t)op2;
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if (unlikely((int32_t)res != res)) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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return (int64_t)((int32_t)res);
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}
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uint64_t helper_mulqv (uint64_t op1, uint64_t op2)
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{
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uint64_t tl, th;
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muls64(&tl, &th, op1, op2);
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/* If th != 0 && th != -1, then we had an overflow */
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if (unlikely((th + 1) > 1)) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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return tl;
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}
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uint64_t helper_umulh (uint64_t op1, uint64_t op2)
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{
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uint64_t tl, th;
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mulu64(&tl, &th, op1, op2);
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return th;
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}
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uint64_t helper_ctpop (uint64_t arg)
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{
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return ctpop64(arg);
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}
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uint64_t helper_ctlz (uint64_t arg)
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{
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return clz64(arg);
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}
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uint64_t helper_cttz (uint64_t arg)
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{
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return ctz64(arg);
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}
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static always_inline uint64_t byte_zap (uint64_t op, uint8_t mskb)
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{
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uint64_t mask;
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mask = 0;
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mask |= ((mskb >> 0) & 1) * 0x00000000000000FFULL;
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mask |= ((mskb >> 1) & 1) * 0x000000000000FF00ULL;
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mask |= ((mskb >> 2) & 1) * 0x0000000000FF0000ULL;
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mask |= ((mskb >> 3) & 1) * 0x00000000FF000000ULL;
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mask |= ((mskb >> 4) & 1) * 0x000000FF00000000ULL;
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mask |= ((mskb >> 5) & 1) * 0x0000FF0000000000ULL;
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mask |= ((mskb >> 6) & 1) * 0x00FF000000000000ULL;
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mask |= ((mskb >> 7) & 1) * 0xFF00000000000000ULL;
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return op & ~mask;
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}
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uint64_t helper_mskbl(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, 0x01 << (mask & 7));
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}
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uint64_t helper_insbl(uint64_t val, uint64_t mask)
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{
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val <<= (mask & 7) * 8;
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return byte_zap(val, ~(0x01 << (mask & 7)));
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}
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uint64_t helper_mskwl(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, 0x03 << (mask & 7));
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}
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uint64_t helper_inswl(uint64_t val, uint64_t mask)
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{
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val <<= (mask & 7) * 8;
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return byte_zap(val, ~(0x03 << (mask & 7)));
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}
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uint64_t helper_mskll(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, 0x0F << (mask & 7));
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}
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uint64_t helper_insll(uint64_t val, uint64_t mask)
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{
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val <<= (mask & 7) * 8;
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return byte_zap(val, ~(0x0F << (mask & 7)));
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}
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uint64_t helper_zap(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, mask);
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}
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uint64_t helper_zapnot(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, ~mask);
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}
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uint64_t helper_mskql(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, 0xFF << (mask & 7));
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}
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uint64_t helper_insql(uint64_t val, uint64_t mask)
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{
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val <<= (mask & 7) * 8;
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return byte_zap(val, ~(0xFF << (mask & 7)));
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}
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uint64_t helper_mskwh(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, (0x03 << (mask & 7)) >> 8);
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}
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uint64_t helper_inswh(uint64_t val, uint64_t mask)
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{
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val >>= 64 - ((mask & 7) * 8);
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return byte_zap(val, ~((0x03 << (mask & 7)) >> 8));
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}
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uint64_t helper_msklh(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, (0x0F << (mask & 7)) >> 8);
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}
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uint64_t helper_inslh(uint64_t val, uint64_t mask)
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{
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val >>= 64 - ((mask & 7) * 8);
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return byte_zap(val, ~((0x0F << (mask & 7)) >> 8));
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}
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uint64_t helper_mskqh(uint64_t val, uint64_t mask)
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{
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return byte_zap(val, (0xFF << (mask & 7)) >> 8);
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}
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uint64_t helper_insqh(uint64_t val, uint64_t mask)
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{
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val >>= 64 - ((mask & 7) * 8);
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return byte_zap(val, ~((0xFF << (mask & 7)) >> 8));
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}
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uint64_t helper_cmpbge (uint64_t op1, uint64_t op2)
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{
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uint8_t opa, opb, res;
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int i;
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res = 0;
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for (i = 0; i < 8; i++) {
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opa = op1 >> (i * 8);
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opb = op2 >> (i * 8);
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if (opa >= opb)
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res |= 1 << i;
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}
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return res;
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}
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/* Floating point helpers */
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/* F floating (VAX) */
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static always_inline uint64_t float32_to_f (float32 fa)
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{
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uint64_t r, exp, mant, sig;
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CPU_FloatU a;
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a.f = fa;
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sig = ((uint64_t)a.l & 0x80000000) << 32;
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exp = (a.l >> 23) & 0xff;
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mant = ((uint64_t)a.l & 0x007fffff) << 29;
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if (exp == 255) {
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/* NaN or infinity */
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r = 1; /* VAX dirty zero */
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} else if (exp == 0) {
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if (mant == 0) {
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/* Zero */
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r = 0;
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} else {
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/* Denormalized */
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r = sig | ((exp + 1) << 52) | mant;
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}
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} else {
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if (exp >= 253) {
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/* Overflow */
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r = 1; /* VAX dirty zero */
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} else {
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r = sig | ((exp + 2) << 52);
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}
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}
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return r;
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}
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static always_inline float32 f_to_float32 (uint64_t a)
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{
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uint32_t exp, mant_sig;
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CPU_FloatU r;
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exp = ((a >> 55) & 0x80) | ((a >> 52) & 0x7f);
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mant_sig = ((a >> 32) & 0x80000000) | ((a >> 29) & 0x007fffff);
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if (unlikely(!exp && mant_sig)) {
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/* Reserved operands / Dirty zero */
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helper_excp(EXCP_OPCDEC, 0);
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}
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if (exp < 3) {
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/* Underflow */
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r.l = 0;
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} else {
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r.l = ((exp - 2) << 23) | mant_sig;
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}
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return r.f;
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}
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uint32_t helper_f_to_memory (uint64_t a)
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{
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uint32_t r;
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r = (a & 0x00001fffe0000000ull) >> 13;
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r |= (a & 0x07ffe00000000000ull) >> 45;
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r |= (a & 0xc000000000000000ull) >> 48;
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return r;
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}
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uint64_t helper_memory_to_f (uint32_t a)
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{
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uint64_t r;
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r = ((uint64_t)(a & 0x0000c000)) << 48;
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r |= ((uint64_t)(a & 0x003fffff)) << 45;
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r |= ((uint64_t)(a & 0xffff0000)) << 13;
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if (!(a & 0x00004000))
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r |= 0x7ll << 59;
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return r;
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}
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uint64_t helper_addf (uint64_t a, uint64_t b)
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{
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float32 fa, fb, fr;
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fa = f_to_float32(a);
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fb = f_to_float32(b);
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fr = float32_add(fa, fb, &FP_STATUS);
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return float32_to_f(fr);
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}
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uint64_t helper_subf (uint64_t a, uint64_t b)
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{
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float32 fa, fb, fr;
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fa = f_to_float32(a);
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fb = f_to_float32(b);
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fr = float32_sub(fa, fb, &FP_STATUS);
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return float32_to_f(fr);
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}
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uint64_t helper_mulf (uint64_t a, uint64_t b)
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{
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float32 fa, fb, fr;
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fa = f_to_float32(a);
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fb = f_to_float32(b);
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fr = float32_mul(fa, fb, &FP_STATUS);
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return float32_to_f(fr);
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}
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uint64_t helper_divf (uint64_t a, uint64_t b)
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{
|
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float32 fa, fb, fr;
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|
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fa = f_to_float32(a);
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fb = f_to_float32(b);
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fr = float32_div(fa, fb, &FP_STATUS);
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return float32_to_f(fr);
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}
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|
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uint64_t helper_sqrtf (uint64_t t)
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{
|
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float32 ft, fr;
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ft = f_to_float32(t);
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fr = float32_sqrt(ft, &FP_STATUS);
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return float32_to_f(fr);
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}
|
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|
|
|
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/* G floating (VAX) */
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static always_inline uint64_t float64_to_g (float64 fa)
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{
|
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uint64_t r, exp, mant, sig;
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CPU_DoubleU a;
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a.d = fa;
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sig = a.ll & 0x8000000000000000ull;
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exp = (a.ll >> 52) & 0x7ff;
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mant = a.ll & 0x000fffffffffffffull;
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|
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if (exp == 2047) {
|
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/* NaN or infinity */
|
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r = 1; /* VAX dirty zero */
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} else if (exp == 0) {
|
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if (mant == 0) {
|
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/* Zero */
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r = 0;
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} else {
|
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/* Denormalized */
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r = sig | ((exp + 1) << 52) | mant;
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}
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} else {
|
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if (exp >= 2045) {
|
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/* Overflow */
|
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r = 1; /* VAX dirty zero */
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} else {
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r = sig | ((exp + 2) << 52);
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}
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}
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|
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return r;
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}
|
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|
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static always_inline float64 g_to_float64 (uint64_t a)
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{
|
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uint64_t exp, mant_sig;
|
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CPU_DoubleU r;
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|
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exp = (a >> 52) & 0x7ff;
|
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mant_sig = a & 0x800fffffffffffffull;
|
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|
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if (!exp && mant_sig) {
|
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/* Reserved operands / Dirty zero */
|
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helper_excp(EXCP_OPCDEC, 0);
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}
|
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|
|
if (exp < 3) {
|
|
/* Underflow */
|
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r.ll = 0;
|
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} else {
|
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r.ll = ((exp - 2) << 52) | mant_sig;
|
|
}
|
|
|
|
return r.d;
|
|
}
|
|
|
|
uint64_t helper_g_to_memory (uint64_t a)
|
|
{
|
|
uint64_t r;
|
|
r = (a & 0x000000000000ffffull) << 48;
|
|
r |= (a & 0x00000000ffff0000ull) << 16;
|
|
r |= (a & 0x0000ffff00000000ull) >> 16;
|
|
r |= (a & 0xffff000000000000ull) >> 48;
|
|
return r;
|
|
}
|
|
|
|
uint64_t helper_memory_to_g (uint64_t a)
|
|
{
|
|
uint64_t r;
|
|
r = (a & 0x000000000000ffffull) << 48;
|
|
r |= (a & 0x00000000ffff0000ull) << 16;
|
|
r |= (a & 0x0000ffff00000000ull) >> 16;
|
|
r |= (a & 0xffff000000000000ull) >> 48;
|
|
return r;
|
|
}
|
|
|
|
uint64_t helper_addg (uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb, fr;
|
|
|
|
fa = g_to_float64(a);
|
|
fb = g_to_float64(b);
|
|
fr = float64_add(fa, fb, &FP_STATUS);
|
|
return float64_to_g(fr);
|
|
}
|
|
|
|
uint64_t helper_subg (uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb, fr;
|
|
|
|
fa = g_to_float64(a);
|
|
fb = g_to_float64(b);
|
|
fr = float64_sub(fa, fb, &FP_STATUS);
|
|
return float64_to_g(fr);
|
|
}
|
|
|
|
uint64_t helper_mulg (uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb, fr;
|
|
|
|
fa = g_to_float64(a);
|
|
fb = g_to_float64(b);
|
|
fr = float64_mul(fa, fb, &FP_STATUS);
|
|
return float64_to_g(fr);
|
|
}
|
|
|
|
uint64_t helper_divg (uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb, fr;
|
|
|
|
fa = g_to_float64(a);
|
|
fb = g_to_float64(b);
|
|
fr = float64_div(fa, fb, &FP_STATUS);
|
|
return float64_to_g(fr);
|
|
}
|
|
|
|
uint64_t helper_sqrtg (uint64_t a)
|
|
{
|
|
float64 fa, fr;
|
|
|
|
fa = g_to_float64(a);
|
|
fr = float64_sqrt(fa, &FP_STATUS);
|
|
return float64_to_g(fr);
|
|
}
|
|
|
|
|
|
/* S floating (single) */
|
|
static always_inline uint64_t float32_to_s (float32 fa)
|
|
{
|
|
CPU_FloatU a;
|
|
uint64_t r;
|
|
|
|
a.f = fa;
|
|
|
|
r = (((uint64_t)(a.l & 0xc0000000)) << 32) | (((uint64_t)(a.l & 0x3fffffff)) << 29);
|
|
if (((a.l & 0x7f800000) != 0x7f800000) && (!(a.l & 0x40000000)))
|
|
r |= 0x7ll << 59;
|
|
return r;
|
|
}
|
|
|
|
static always_inline float32 s_to_float32 (uint64_t a)
|
|
{
|
|
CPU_FloatU r;
|
|
r.l = ((a >> 32) & 0xc0000000) | ((a >> 29) & 0x3fffffff);
|
|
return r.f;
|
|
}
|
|
|
|
uint32_t helper_s_to_memory (uint64_t a)
|
|
{
|
|
/* Memory format is the same as float32 */
|
|
float32 fa = s_to_float32(a);
|
|
return *(uint32_t*)(&fa);
|
|
}
|
|
|
|
uint64_t helper_memory_to_s (uint32_t a)
|
|
{
|
|
/* Memory format is the same as float32 */
|
|
return float32_to_s(*(float32*)(&a));
|
|
}
|
|
|
|
uint64_t helper_adds (uint64_t a, uint64_t b)
|
|
{
|
|
float32 fa, fb, fr;
|
|
|
|
fa = s_to_float32(a);
|
|
fb = s_to_float32(b);
|
|
fr = float32_add(fa, fb, &FP_STATUS);
|
|
return float32_to_s(fr);
|
|
}
|
|
|
|
uint64_t helper_subs (uint64_t a, uint64_t b)
|
|
{
|
|
float32 fa, fb, fr;
|
|
|
|
fa = s_to_float32(a);
|
|
fb = s_to_float32(b);
|
|
fr = float32_sub(fa, fb, &FP_STATUS);
|
|
return float32_to_s(fr);
|
|
}
|
|
|
|
uint64_t helper_muls (uint64_t a, uint64_t b)
|
|
{
|
|
float32 fa, fb, fr;
|
|
|
|
fa = s_to_float32(a);
|
|
fb = s_to_float32(b);
|
|
fr = float32_mul(fa, fb, &FP_STATUS);
|
|
return float32_to_s(fr);
|
|
}
|
|
|
|
uint64_t helper_divs (uint64_t a, uint64_t b)
|
|
{
|
|
float32 fa, fb, fr;
|
|
|
|
fa = s_to_float32(a);
|
|
fb = s_to_float32(b);
|
|
fr = float32_div(fa, fb, &FP_STATUS);
|
|
return float32_to_s(fr);
|
|
}
|
|
|
|
uint64_t helper_sqrts (uint64_t a)
|
|
{
|
|
float32 fa, fr;
|
|
|
|
fa = s_to_float32(a);
|
|
fr = float32_sqrt(fa, &FP_STATUS);
|
|
return float32_to_s(fr);
|
|
}
|
|
|
|
|
|
/* T floating (double) */
|
|
static always_inline float64 t_to_float64 (uint64_t a)
|
|
{
|
|
/* Memory format is the same as float64 */
|
|
CPU_DoubleU r;
|
|
r.ll = a;
|
|
return r.d;
|
|
}
|
|
|
|
static always_inline uint64_t float64_to_t (float64 fa)
|
|
{
|
|
/* Memory format is the same as float64 */
|
|
CPU_DoubleU r;
|
|
r.d = fa;
|
|
return r.ll;
|
|
}
|
|
|
|
uint64_t helper_addt (uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb, fr;
|
|
|
|
fa = t_to_float64(a);
|
|
fb = t_to_float64(b);
|
|
fr = float64_add(fa, fb, &FP_STATUS);
|
|
return float64_to_t(fr);
|
|
}
|
|
|
|
uint64_t helper_subt (uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb, fr;
|
|
|
|
fa = t_to_float64(a);
|
|
fb = t_to_float64(b);
|
|
fr = float64_sub(fa, fb, &FP_STATUS);
|
|
return float64_to_t(fr);
|
|
}
|
|
|
|
uint64_t helper_mult (uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb, fr;
|
|
|
|
fa = t_to_float64(a);
|
|
fb = t_to_float64(b);
|
|
fr = float64_mul(fa, fb, &FP_STATUS);
|
|
return float64_to_t(fr);
|
|
}
|
|
|
|
uint64_t helper_divt (uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb, fr;
|
|
|
|
fa = t_to_float64(a);
|
|
fb = t_to_float64(b);
|
|
fr = float64_div(fa, fb, &FP_STATUS);
|
|
return float64_to_t(fr);
|
|
}
|
|
|
|
uint64_t helper_sqrtt (uint64_t a)
|
|
{
|
|
float64 fa, fr;
|
|
|
|
fa = t_to_float64(a);
|
|
fr = float64_sqrt(fa, &FP_STATUS);
|
|
return float64_to_t(fr);
|
|
}
|
|
|
|
|
|
/* Sign copy */
|
|
uint64_t helper_cpys(uint64_t a, uint64_t b)
|
|
{
|
|
return (a & 0x8000000000000000ULL) | (b & ~0x8000000000000000ULL);
|
|
}
|
|
|
|
uint64_t helper_cpysn(uint64_t a, uint64_t b)
|
|
{
|
|
return ((~a) & 0x8000000000000000ULL) | (b & ~0x8000000000000000ULL);
|
|
}
|
|
|
|
uint64_t helper_cpyse(uint64_t a, uint64_t b)
|
|
{
|
|
return (a & 0xFFF0000000000000ULL) | (b & ~0xFFF0000000000000ULL);
|
|
}
|
|
|
|
|
|
/* Comparisons */
|
|
uint64_t helper_cmptun (uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb;
|
|
|
|
fa = t_to_float64(a);
|
|
fb = t_to_float64(b);
|
|
|
|
if (float64_is_nan(fa) || float64_is_nan(fb))
|
|
return 0x4000000000000000ULL;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
uint64_t helper_cmpteq(uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb;
|
|
|
|
fa = t_to_float64(a);
|
|
fb = t_to_float64(b);
|
|
|
|
if (float64_eq(fa, fb, &FP_STATUS))
|
|
return 0x4000000000000000ULL;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
uint64_t helper_cmptle(uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb;
|
|
|
|
fa = t_to_float64(a);
|
|
fb = t_to_float64(b);
|
|
|
|
if (float64_le(fa, fb, &FP_STATUS))
|
|
return 0x4000000000000000ULL;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
uint64_t helper_cmptlt(uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb;
|
|
|
|
fa = t_to_float64(a);
|
|
fb = t_to_float64(b);
|
|
|
|
if (float64_lt(fa, fb, &FP_STATUS))
|
|
return 0x4000000000000000ULL;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
uint64_t helper_cmpgeq(uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb;
|
|
|
|
fa = g_to_float64(a);
|
|
fb = g_to_float64(b);
|
|
|
|
if (float64_eq(fa, fb, &FP_STATUS))
|
|
return 0x4000000000000000ULL;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
uint64_t helper_cmpgle(uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb;
|
|
|
|
fa = g_to_float64(a);
|
|
fb = g_to_float64(b);
|
|
|
|
if (float64_le(fa, fb, &FP_STATUS))
|
|
return 0x4000000000000000ULL;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
uint64_t helper_cmpglt(uint64_t a, uint64_t b)
|
|
{
|
|
float64 fa, fb;
|
|
|
|
fa = g_to_float64(a);
|
|
fb = g_to_float64(b);
|
|
|
|
if (float64_lt(fa, fb, &FP_STATUS))
|
|
return 0x4000000000000000ULL;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
uint64_t helper_cmpfeq (uint64_t a)
|
|
{
|
|
return !(a & 0x7FFFFFFFFFFFFFFFULL);
|
|
}
|
|
|
|
uint64_t helper_cmpfne (uint64_t a)
|
|
{
|
|
return (a & 0x7FFFFFFFFFFFFFFFULL);
|
|
}
|
|
|
|
uint64_t helper_cmpflt (uint64_t a)
|
|
{
|
|
return (a & 0x8000000000000000ULL) && (a & 0x7FFFFFFFFFFFFFFFULL);
|
|
}
|
|
|
|
uint64_t helper_cmpfle (uint64_t a)
|
|
{
|
|
return (a & 0x8000000000000000ULL) || !(a & 0x7FFFFFFFFFFFFFFFULL);
|
|
}
|
|
|
|
uint64_t helper_cmpfgt (uint64_t a)
|
|
{
|
|
return !(a & 0x8000000000000000ULL) && (a & 0x7FFFFFFFFFFFFFFFULL);
|
|
}
|
|
|
|
uint64_t helper_cmpfge (uint64_t a)
|
|
{
|
|
return !(a & 0x8000000000000000ULL) || !(a & 0x7FFFFFFFFFFFFFFFULL);
|
|
}
|
|
|
|
|
|
/* Floating point format conversion */
|
|
uint64_t helper_cvtts (uint64_t a)
|
|
{
|
|
float64 fa;
|
|
float32 fr;
|
|
|
|
fa = t_to_float64(a);
|
|
fr = float64_to_float32(fa, &FP_STATUS);
|
|
return float32_to_s(fr);
|
|
}
|
|
|
|
uint64_t helper_cvtst (uint64_t a)
|
|
{
|
|
float32 fa;
|
|
float64 fr;
|
|
|
|
fa = s_to_float32(a);
|
|
fr = float32_to_float64(fa, &FP_STATUS);
|
|
return float64_to_t(fr);
|
|
}
|
|
|
|
uint64_t helper_cvtqs (uint64_t a)
|
|
{
|
|
float32 fr = int64_to_float32(a, &FP_STATUS);
|
|
return float32_to_s(fr);
|
|
}
|
|
|
|
uint64_t helper_cvttq (uint64_t a)
|
|
{
|
|
float64 fa = t_to_float64(a);
|
|
return float64_to_int64_round_to_zero(fa, &FP_STATUS);
|
|
}
|
|
|
|
uint64_t helper_cvtqt (uint64_t a)
|
|
{
|
|
float64 fr = int64_to_float64(a, &FP_STATUS);
|
|
return float64_to_t(fr);
|
|
}
|
|
|
|
uint64_t helper_cvtqf (uint64_t a)
|
|
{
|
|
float32 fr = int64_to_float32(a, &FP_STATUS);
|
|
return float32_to_f(fr);
|
|
}
|
|
|
|
uint64_t helper_cvtgf (uint64_t a)
|
|
{
|
|
float64 fa;
|
|
float32 fr;
|
|
|
|
fa = g_to_float64(a);
|
|
fr = float64_to_float32(fa, &FP_STATUS);
|
|
return float32_to_f(fr);
|
|
}
|
|
|
|
uint64_t helper_cvtgq (uint64_t a)
|
|
{
|
|
float64 fa = g_to_float64(a);
|
|
return float64_to_int64_round_to_zero(fa, &FP_STATUS);
|
|
}
|
|
|
|
uint64_t helper_cvtqg (uint64_t a)
|
|
{
|
|
float64 fr;
|
|
fr = int64_to_float64(a, &FP_STATUS);
|
|
return float64_to_g(fr);
|
|
}
|
|
|
|
uint64_t helper_cvtlq (uint64_t a)
|
|
{
|
|
return (int64_t)((int32_t)((a >> 32) | ((a >> 29) & 0x3FFFFFFF)));
|
|
}
|
|
|
|
static always_inline uint64_t __helper_cvtql (uint64_t a, int s, int v)
|
|
{
|
|
uint64_t r;
|
|
|
|
r = ((uint64_t)(a & 0xC0000000)) << 32;
|
|
r |= ((uint64_t)(a & 0x7FFFFFFF)) << 29;
|
|
|
|
if (v && (int64_t)((int32_t)r) != (int64_t)r) {
|
|
helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
|
|
}
|
|
if (s) {
|
|
/* TODO */
|
|
}
|
|
return r;
|
|
}
|
|
|
|
uint64_t helper_cvtql (uint64_t a)
|
|
{
|
|
return __helper_cvtql(a, 0, 0);
|
|
}
|
|
|
|
uint64_t helper_cvtqlv (uint64_t a)
|
|
{
|
|
return __helper_cvtql(a, 0, 1);
|
|
}
|
|
|
|
uint64_t helper_cvtqlsv (uint64_t a)
|
|
{
|
|
return __helper_cvtql(a, 1, 1);
|
|
}
|
|
|
|
/* PALcode support special instructions */
|
|
#if !defined (CONFIG_USER_ONLY)
|
|
void helper_hw_rei (void)
|
|
{
|
|
env->pc = env->ipr[IPR_EXC_ADDR] & ~3;
|
|
env->ipr[IPR_EXC_ADDR] = env->ipr[IPR_EXC_ADDR] & 1;
|
|
/* XXX: re-enable interrupts and memory mapping */
|
|
}
|
|
|
|
void helper_hw_ret (uint64_t a)
|
|
{
|
|
env->pc = a & ~3;
|
|
env->ipr[IPR_EXC_ADDR] = a & 1;
|
|
/* XXX: re-enable interrupts and memory mapping */
|
|
}
|
|
|
|
uint64_t helper_mfpr (int iprn, uint64_t val)
|
|
{
|
|
uint64_t tmp;
|
|
|
|
if (cpu_alpha_mfpr(env, iprn, &tmp) == 0)
|
|
val = tmp;
|
|
|
|
return val;
|
|
}
|
|
|
|
void helper_mtpr (int iprn, uint64_t val)
|
|
{
|
|
cpu_alpha_mtpr(env, iprn, val, NULL);
|
|
}
|
|
|
|
void helper_set_alt_mode (void)
|
|
{
|
|
env->saved_mode = env->ps & 0xC;
|
|
env->ps = (env->ps & ~0xC) | (env->ipr[IPR_ALT_MODE] & 0xC);
|
|
}
|
|
|
|
void helper_restore_mode (void)
|
|
{
|
|
env->ps = (env->ps & ~0xC) | env->saved_mode;
|
|
}
|
|
|
|
#endif
|
|
|
|
/*****************************************************************************/
|
|
/* Softmmu support */
|
|
#if !defined (CONFIG_USER_ONLY)
|
|
|
|
/* XXX: the two following helpers are pure hacks.
|
|
* Hopefully, we emulate the PALcode, then we should never see
|
|
* HW_LD / HW_ST instructions.
|
|
*/
|
|
uint64_t helper_ld_virt_to_phys (uint64_t virtaddr)
|
|
{
|
|
uint64_t tlb_addr, physaddr;
|
|
int index, mmu_idx;
|
|
void *retaddr;
|
|
|
|
mmu_idx = cpu_mmu_index(env);
|
|
index = (virtaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
|
|
redo:
|
|
tlb_addr = env->tlb_table[mmu_idx][index].addr_read;
|
|
if ((virtaddr & TARGET_PAGE_MASK) ==
|
|
(tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
|
|
physaddr = virtaddr + env->tlb_table[mmu_idx][index].addend;
|
|
} else {
|
|
/* the page is not in the TLB : fill it */
|
|
retaddr = GETPC();
|
|
tlb_fill(virtaddr, 0, mmu_idx, retaddr);
|
|
goto redo;
|
|
}
|
|
return physaddr;
|
|
}
|
|
|
|
uint64_t helper_st_virt_to_phys (uint64_t virtaddr)
|
|
{
|
|
uint64_t tlb_addr, physaddr;
|
|
int index, mmu_idx;
|
|
void *retaddr;
|
|
|
|
mmu_idx = cpu_mmu_index(env);
|
|
index = (virtaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
|
|
redo:
|
|
tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
|
|
if ((virtaddr & TARGET_PAGE_MASK) ==
|
|
(tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
|
|
physaddr = virtaddr + env->tlb_table[mmu_idx][index].addend;
|
|
} else {
|
|
/* the page is not in the TLB : fill it */
|
|
retaddr = GETPC();
|
|
tlb_fill(virtaddr, 1, mmu_idx, retaddr);
|
|
goto redo;
|
|
}
|
|
return physaddr;
|
|
}
|
|
|
|
void helper_ldl_raw(uint64_t t0, uint64_t t1)
|
|
{
|
|
ldl_raw(t1, t0);
|
|
}
|
|
|
|
void helper_ldq_raw(uint64_t t0, uint64_t t1)
|
|
{
|
|
ldq_raw(t1, t0);
|
|
}
|
|
|
|
void helper_ldl_l_raw(uint64_t t0, uint64_t t1)
|
|
{
|
|
env->lock = t1;
|
|
ldl_raw(t1, t0);
|
|
}
|
|
|
|
void helper_ldq_l_raw(uint64_t t0, uint64_t t1)
|
|
{
|
|
env->lock = t1;
|
|
ldl_raw(t1, t0);
|
|
}
|
|
|
|
void helper_ldl_kernel(uint64_t t0, uint64_t t1)
|
|
{
|
|
ldl_kernel(t1, t0);
|
|
}
|
|
|
|
void helper_ldq_kernel(uint64_t t0, uint64_t t1)
|
|
{
|
|
ldq_kernel(t1, t0);
|
|
}
|
|
|
|
void helper_ldl_data(uint64_t t0, uint64_t t1)
|
|
{
|
|
ldl_data(t1, t0);
|
|
}
|
|
|
|
void helper_ldq_data(uint64_t t0, uint64_t t1)
|
|
{
|
|
ldq_data(t1, t0);
|
|
}
|
|
|
|
void helper_stl_raw(uint64_t t0, uint64_t t1)
|
|
{
|
|
stl_raw(t1, t0);
|
|
}
|
|
|
|
void helper_stq_raw(uint64_t t0, uint64_t t1)
|
|
{
|
|
stq_raw(t1, t0);
|
|
}
|
|
|
|
uint64_t helper_stl_c_raw(uint64_t t0, uint64_t t1)
|
|
{
|
|
uint64_t ret;
|
|
|
|
if (t1 == env->lock) {
|
|
stl_raw(t1, t0);
|
|
ret = 0;
|
|
} else
|
|
ret = 1;
|
|
|
|
env->lock = 1;
|
|
|
|
return ret;
|
|
}
|
|
|
|
uint64_t helper_stq_c_raw(uint64_t t0, uint64_t t1)
|
|
{
|
|
uint64_t ret;
|
|
|
|
if (t1 == env->lock) {
|
|
stq_raw(t1, t0);
|
|
ret = 0;
|
|
} else
|
|
ret = 1;
|
|
|
|
env->lock = 1;
|
|
|
|
return ret;
|
|
}
|
|
|
|
#define MMUSUFFIX _mmu
|
|
|
|
#define SHIFT 0
|
|
#include "softmmu_template.h"
|
|
|
|
#define SHIFT 1
|
|
#include "softmmu_template.h"
|
|
|
|
#define SHIFT 2
|
|
#include "softmmu_template.h"
|
|
|
|
#define SHIFT 3
|
|
#include "softmmu_template.h"
|
|
|
|
/* try to fill the TLB and return an exception if error. If retaddr is
|
|
NULL, it means that the function was called in C code (i.e. not
|
|
from generated code or from helper.c) */
|
|
/* XXX: fix it to restore all registers */
|
|
void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
|
|
{
|
|
TranslationBlock *tb;
|
|
CPUState *saved_env;
|
|
unsigned long pc;
|
|
int ret;
|
|
|
|
/* XXX: hack to restore env in all cases, even if not called from
|
|
generated code */
|
|
saved_env = env;
|
|
env = cpu_single_env;
|
|
ret = cpu_alpha_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
|
|
if (!likely(ret == 0)) {
|
|
if (likely(retaddr)) {
|
|
/* now we have a real cpu fault */
|
|
pc = (unsigned long)retaddr;
|
|
tb = tb_find_pc(pc);
|
|
if (likely(tb)) {
|
|
/* the PC is inside the translated code. It means that we have
|
|
a virtual CPU fault */
|
|
cpu_restore_state(tb, env, pc, NULL);
|
|
}
|
|
}
|
|
/* Exception index and error code are already set */
|
|
cpu_loop_exit();
|
|
}
|
|
env = saved_env;
|
|
}
|
|
|
|
#endif
|