e098b45386
This adds symbols required for PPC64 pseries platform features: 1. sPAPR live migration; 2. in-kernel XICS interrupt controller. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
139 lines
3.1 KiB
C
139 lines
3.1 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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* Copyright (C) 2013 Cavium, Inc.
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* Authors: Sanjay Lal <sanjayl@kymasys.com>
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*/
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#ifndef __LINUX_KVM_MIPS_H
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#define __LINUX_KVM_MIPS_H
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#include <linux/types.h>
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/*
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* KVM MIPS specific structures and definitions.
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*
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* Some parts derived from the x86 version of this file.
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*/
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/*
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* for KVM_GET_REGS and KVM_SET_REGS
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*
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* If Config[AT] is zero (32-bit CPU), the register contents are
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* stored in the lower 32-bits of the struct kvm_regs fields and sign
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* extended to 64-bits.
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*/
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struct kvm_regs {
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/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
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__u64 gpr[32];
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__u64 hi;
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__u64 lo;
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__u64 pc;
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};
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/*
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* for KVM_GET_FPU and KVM_SET_FPU
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*
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* If Status[FR] is zero (32-bit FPU), the upper 32-bits of the FPRs
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* are zero filled.
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*/
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struct kvm_fpu {
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__u64 fpr[32];
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__u32 fir;
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__u32 fccr;
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__u32 fexr;
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__u32 fenr;
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__u32 fcsr;
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__u32 pad;
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};
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/*
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* For MIPS, we use KVM_SET_ONE_REG and KVM_GET_ONE_REG to access CP0
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* registers. The id field is broken down as follows:
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*
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* bits[2..0] - Register 'sel' index.
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* bits[7..3] - Register 'rd' index.
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* bits[15..8] - Must be zero.
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* bits[63..16] - 1 -> CP0 registers.
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*
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* Other sets registers may be added in the future. Each set would
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* have its own identifier in bits[63..16].
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*
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* The addr field of struct kvm_one_reg must point to an aligned
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* 64-bit wide location. For registers that are narrower than
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* 64-bits, the value is stored in the low order bits of the location,
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* and sign extended to 64-bits.
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*
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* The registers defined in struct kvm_regs are also accessible, the
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* id values for these are below.
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*/
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#define KVM_REG_MIPS_R0 0
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#define KVM_REG_MIPS_R1 1
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#define KVM_REG_MIPS_R2 2
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#define KVM_REG_MIPS_R3 3
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#define KVM_REG_MIPS_R4 4
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#define KVM_REG_MIPS_R5 5
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#define KVM_REG_MIPS_R6 6
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#define KVM_REG_MIPS_R7 7
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#define KVM_REG_MIPS_R8 8
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#define KVM_REG_MIPS_R9 9
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#define KVM_REG_MIPS_R10 10
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#define KVM_REG_MIPS_R11 11
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#define KVM_REG_MIPS_R12 12
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#define KVM_REG_MIPS_R13 13
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#define KVM_REG_MIPS_R14 14
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#define KVM_REG_MIPS_R15 15
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#define KVM_REG_MIPS_R16 16
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#define KVM_REG_MIPS_R17 17
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#define KVM_REG_MIPS_R18 18
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#define KVM_REG_MIPS_R19 19
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#define KVM_REG_MIPS_R20 20
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#define KVM_REG_MIPS_R21 21
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#define KVM_REG_MIPS_R22 22
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#define KVM_REG_MIPS_R23 23
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#define KVM_REG_MIPS_R24 24
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#define KVM_REG_MIPS_R25 25
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#define KVM_REG_MIPS_R26 26
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#define KVM_REG_MIPS_R27 27
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#define KVM_REG_MIPS_R28 28
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#define KVM_REG_MIPS_R29 29
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#define KVM_REG_MIPS_R30 30
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#define KVM_REG_MIPS_R31 31
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#define KVM_REG_MIPS_HI 32
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#define KVM_REG_MIPS_LO 33
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#define KVM_REG_MIPS_PC 34
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/*
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* KVM MIPS specific structures and definitions
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*
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*/
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struct kvm_debug_exit_arch {
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__u64 epc;
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};
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/* for KVM_SET_GUEST_DEBUG */
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struct kvm_guest_debug_arch {
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};
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/* definition of registers in kvm_run */
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struct kvm_sync_regs {
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};
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/* dummy definition */
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struct kvm_sregs {
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};
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struct kvm_mips_interrupt {
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/* in */
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__u32 cpu;
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__u32 irq;
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};
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#endif /* __LINUX_KVM_MIPS_H */
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