3cf1e035ba
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@580 c046a42c-6fe2-441c-8c8c-71466251a162
60 lines
1.6 KiB
C
60 lines
1.6 KiB
C
#ifndef CPU_SPARC_H
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#define CPU_SPARC_H
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#define TARGET_LONG_BITS 32
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#include "cpu-defs.h"
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/*#define EXCP_INTERRUPT 0x100*/
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/* trap definitions */
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#define TT_ILL_INSN 0x02
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#define TT_WIN_OVF 0x05
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#define TT_WIN_UNF 0x06
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#define TT_DIV_ZERO 0x2a
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#define TT_TRAP 0x80
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#define PSR_NEG (1<<23)
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#define PSR_ZERO (1<<22)
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#define PSR_OVF (1<<21)
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#define PSR_CARRY (1<<20)
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#define NWINDOWS 32
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typedef struct CPUSPARCState {
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uint32_t gregs[8]; /* general registers */
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uint32_t *regwptr; /* pointer to current register window */
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double *regfptr; /* floating point registers */
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uint32_t pc; /* program counter */
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uint32_t npc; /* next program counter */
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uint32_t sp; /* stack pointer */
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uint32_t y; /* multiply/divide register */
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uint32_t psr; /* processor state register */
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uint32_t T2;
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uint32_t cwp; /* index of current register window (extracted
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from PSR) */
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uint32_t wim; /* window invalid mask */
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jmp_buf jmp_env;
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int user_mode_only;
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int exception_index;
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int interrupt_index;
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int interrupt_request;
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struct TranslationBlock *current_tb;
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void *opaque;
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/* NOTE: we allow 8 more registers to handle wrapping */
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uint32_t regbase[NWINDOWS * 16 + 8];
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} CPUSPARCState;
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CPUSPARCState *cpu_sparc_init(void);
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int cpu_sparc_exec(CPUSPARCState *s);
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int cpu_sparc_close(CPUSPARCState *s);
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struct siginfo;
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int cpu_sparc_signal_handler(int hostsignum, struct siginfo *info, void *puc);
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void cpu_sparc_dump_state(CPUSPARCState *env, FILE *f, int flags);
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#define TARGET_PAGE_BITS 13
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#include "cpu-all.h"
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#endif
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