qemu/include/hw/riscv
Bin Meng fc9ec3625f
hw/riscv: Move the dtb load bits outside of create_fdt()
Move the dtb load bits outside of create_fdt(), and put it explicitly
in sifive_u_machine_init() and virt_machine_init(). With such change
create_fdt() does exactly what its function name tells us.

Suggested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20230228074522.1845007-2-bmeng@tinylab.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-03-01 17:19:14 -08:00
..
boot_opensbi.h include: Include headers where needed 2023-01-08 01:54:22 -05:00
boot.h hw/riscv/boot.c: make riscv_load_initrd() static 2023-02-16 07:55:37 -08:00
microchip_pfsoc.h include: Include headers where needed 2023-01-08 01:54:22 -05:00
numa.h hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix() 2023-01-20 10:14:14 +10:00
opentitan.h include/hw/riscv/opentitan: update opentitan IRQs 2023-02-07 08:19:22 +10:00
riscv_hart.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
shakti_c.h hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0 2023-01-06 10:42:55 +10:00
sifive_cpu.h riscv: Add a sifive_cpu.h to include both E and U cpu type defines 2019-09-17 08:42:46 -07:00
sifive_e.h hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0 2023-01-06 10:42:55 +10:00
sifive_u.h hw/riscv: Move the dtb load bits outside of create_fdt() 2023-03-01 17:19:14 -08:00
spike.h hw/riscv/spike: use 'fdt' from MachineState 2023-01-20 10:14:13 +10:00
virt.h include: Include headers where needed 2023-01-08 01:54:22 -05:00