qemu/target/arm
Peter Maydell dde4d028dc target/arm: Make cpregs 0, c0, c{3-15}, {0-7} correctly RAZ in v8
In the AArch32 ID register scheme, coprocessor registers with
encoding cp15, 0, c0, c{0-7}, {0-7} are all in the space covered by
what in v6 and v7 was called the "CPUID scheme", and are supposed to
RAZ if they're not allocated to a specific ID register.  For our
pre-v8 CPUs we get this right, because the regdefs in
id_pre_v8_midr_cp_reginfo[] cover these RAZ requirements.  However
for v8 we failed to put in the necessary patterns to cover this, so
we end up UNDEFing on everything we didn't have an ID register for.
This is a problem because in Armv8 some encodings in 0, c0, c3, {0-7}
are now being used for new ID registers, and guests might thus start
trying to read them.  (We already have one of these: ID_PFR2.)

For v8 CPUs, we already have regdefs for 0, c0, c{0-2}, {0-7} (that
is, the space is completely allocated with no reserved spaces).  Add
entries to v8_idregs[] covering 0, c0, c3, {0-7}:
 * c3, {0-2} is the reserved AArch32 space corresponding to the
   AArch64 MVFR[012]_EL1
 * c3, {3,5,6,7} are reserved RAZ for both AArch32 and AArch64
   (in fact some of these are given defined meanings in Armv8.6,
   but we don't implement them yet)
 * c3, 4 is ID_PFR2 (already defined)

We then programmatically add RAZ patterns for AArch32 for
0, c0, c{4..15}, {0-7}:
 * c4-c7 are unused, and not shared with AArch64 (these
   are the encodings corresponding to where the AArch64
   specific ID registers live in the system register space)
 * c8-c15 weren't required to RAZ in v6/v7, but v8 extends
   the AArch32 reserved-should-RAZ space to cover these;
   the equivalent area of the AArch64 sysreg space is not
   defined as must-RAZ

Note that the architecture allows some registers in this space
to return an UNKNOWN value; we always return 0.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220819110052.2942289-2-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-09-14 11:19:39 +01:00
..
hvf Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
a32-uncond.decode
a32.decode target/arm: Implement ESB instruction 2022-05-09 11:47:54 +01:00
arch_dump.c target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el 2022-06-08 19:38:57 +01:00
arm_ldst.h accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
arm-powerctl.c
arm-powerctl.h
common-semi-target.h semihosting: Split out common-semi-target.h 2022-06-28 04:35:07 +05:30
cpregs.h target/arm: Move define_debug_regs() to debug_helper.c 2022-07-07 11:37:33 +01:00
cpu64.c target/arm: Add cortex-a35 2022-09-14 11:19:39 +01:00
cpu_tcg.c target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2 2022-07-07 11:37:33 +01:00
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu.c target/arm: Don't report Statistical Profiling Extension in ID registers 2022-08-12 11:17:35 +01:00
cpu.h target/arm: Add MO_128 entry to pred_esz_masks[] 2022-07-26 13:38:23 +01:00
crypto_helper.c crypto: move sm4_sbox from target/arm 2022-04-29 10:47:45 +10:00
debug_helper.c target/arm: Store TCR_EL* registers as uint64_t 2022-07-18 13:20:13 +01:00
gdbstub64.c target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el 2022-06-08 19:38:57 +01:00
gdbstub.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
helper-a64.c target/arm: Change CPUArchState.aarch64 to bool 2022-04-22 14:44:54 +01:00
helper-a64.h target/arm: Merge mte_check1, mte_checkN 2021-04-30 11:16:49 +01:00
helper-mve.h target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
helper-sme.h target/arm: Implement SME integer outer product 2022-07-11 13:43:51 +01:00
helper-sve.h target/arm: Implement REVD 2022-07-11 13:43:51 +01:00
helper.c target/arm: Make cpregs 0, c0, c{3-15}, {0-7} correctly RAZ in v8 2022-09-14 11:19:39 +01:00
helper.h target/arm: Implement SCLAMP, UCLAMP 2022-07-11 13:43:51 +01:00
hvf_arm.h target: Use forward declared type instead of structure type 2022-03-06 22:22:40 +01:00
idau.h
internals.h target/arm: Honour VTCR_EL2 bits in Secure EL2 2022-07-18 13:20:14 +01:00
iwmmxt_helper.c
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm64.c target/arm: Move sve probe inside kvm >= 4.15 branch 2022-08-01 16:21:18 +01:00
kvm_arm.h target/arm: Use uint32_t instead of bitmap for sve vq's 2022-06-08 19:38:57 +01:00
kvm-consts.h target/arm: Report KVM's actual PSCI version to guest in dtb 2022-03-02 19:27:37 +00:00
kvm-stub.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
kvm.c kvm: don't use perror() without useful errno 2022-07-29 00:15:02 +02:00
m_helper.c semihosting: Return void from do_common_semihosting 2022-06-28 04:35:07 +05:30
m-nocp.decode target/arm: Don't NOCP fault for FPCXT_NS accesses 2021-06-21 16:49:37 +01:00
machine.c target/arm: Add the SME ZA storage to CPUARMState 2022-06-27 11:18:17 +01:00
meson.build target/arm: Trap non-streaming usage when Streaming SVE is active 2022-07-11 13:19:35 +01:00
monitor.c target/arm: Add cpu properties to control pauth 2021-01-19 14:38:51 +00:00
mte_helper.c exec/exec-all: Move 'qemu/log.h' include in units requiring it 2022-02-21 10:18:06 +01:00
mve_helper.c target/arm: Use expand_pred_b in mve_helper.c 2022-06-08 19:38:58 +01:00
mve.decode target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
neon_helper.c Replace config-time define HOST_WORDS_BIGENDIAN 2022-04-06 10:50:37 +02:00
neon-dp.decode target/arm: Implement vector float32 to bfloat16 conversion 2021-06-03 16:43:26 +01:00
neon-ls.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
neon-shared.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
op_addsub.h
op_helper.c target/arm: Introduce helper_exception_with_syndrome 2022-06-10 14:32:34 +01:00
pauth_helper.c compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
psci.c target/arm: Support PSCI 1.1 and SMCCC 1.0 2022-03-02 19:27:36 +00:00
ptw.c target/arm: Store TCR_EL* registers as uint64_t 2022-07-18 13:20:13 +01:00
sme_helper.c target/arm: Implement SME integer outer product 2022-07-11 13:43:51 +01:00
sme-fa64.decode target/arm: Mark LD1RO as non-streaming 2022-07-11 13:19:35 +01:00
sme.decode target/arm: Implement SME integer outer product 2022-07-11 13:43:51 +01:00
sve_helper.c target/arm: Implement REVD 2022-07-11 13:43:51 +01:00
sve_ldst_internal.h target/arm: Export sve contiguous ldst support functions 2022-06-08 19:38:58 +01:00
sve.decode target/arm: Implement SCLAMP, UCLAMP 2022-07-11 13:43:51 +01:00
syndrome.h target/arm: Add syn_smetrap 2022-06-27 11:18:17 +01:00
t16.decode
t32.decode target/arm: Implement ESB instruction 2022-05-09 11:47:54 +01:00
tlb_helper.c target/arm: Fold regime_tcr() and regime_tcr_value() together 2022-07-18 13:20:13 +01:00
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h
translate-a32.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
translate-a64.c target/arm: Don't set syndrome ISS for loads and stores with writeback 2022-07-18 13:20:14 +01:00
translate-a64.h target/arm: Export unpredicated ld/st from translate-sve.c 2022-07-11 13:19:35 +01:00
translate-m-nocp.c target/arm: Introduce gen_exception_insn 2022-06-10 14:32:32 +01:00
translate-mve.c target/arm: Introduce gen_exception_insn 2022-06-10 14:32:32 +01:00
translate-neon.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
translate-sme.c target/arm: Implement SME integer outer product 2022-07-11 13:43:51 +01:00
translate-sve.c target/arm: Add MO_128 entry to pred_esz_masks[] 2022-07-26 13:38:23 +01:00
translate-vfp.c target/arm: Trap non-streaming usage when Streaming SVE is active 2022-07-11 13:19:35 +01:00
translate.c accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
translate.h target/arm: Implement SME MOVA 2022-07-11 13:19:35 +01:00
vec_helper.c target/arm: Implement SCLAMP, UCLAMP 2022-07-11 13:43:51 +01:00
vec_internal.h target/arm: Export bfdotadd from vec_helper.c 2022-06-08 19:38:58 +01:00
vfp_helper.c target/arm: Check NaN mode before silencing NaN 2021-07-02 11:48:36 +01:00
vfp-uncond.decode
vfp.decode target/arm: Don't NOCP fault for FPCXT_NS accesses 2021-06-21 16:49:37 +01:00