qemu/target-tilegx
Chen Gang dd8070d865 target-tilegx: Decode ill pseudo-instructions
Notice raise and bpt, decoding the constants embedded in the
nop addil instruction in the x0 slot.

[rth: Generalize TILEGX_EXCP_OPCODE_ILL to TILEGX_EXCP_SIGNAL.
Drop validation of signal values.]

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Message-Id: <1443243635-4886-1-git-send-email-gang.chen.5i5j@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-10-07 20:03:15 +11:00
..
cpu.c target-tilegx: Generate SEGV properly 2015-09-15 07:45:28 -07:00
cpu.h target-tilegx: Decode ill pseudo-instructions 2015-10-07 20:03:15 +11:00
helper.c target-tilegx: Implement complex multiply instructions 2015-10-07 20:03:14 +11:00
helper.h target-tilegx: Implement complex multiply instructions 2015-10-07 20:03:14 +11:00
Makefile.objs target-tilegx: Handle v1shl, v1shru, v1shrs 2015-09-15 07:45:34 -07:00
opcode_tilegx.h target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1 2015-09-15 07:41:35 -07:00
simd_helper.c target-tilegx: Implement v1multu instruction 2015-10-07 20:03:14 +11:00
spr_def_64.h target-tilegx: Add special register information from Tilera Corporation 2015-09-15 07:41:35 -07:00
translate.c target-tilegx: Decode ill pseudo-instructions 2015-10-07 20:03:15 +11:00