qemu/target/arm
Peter Maydell 4c09abeae8 target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk
In a two-stage translation, the result of the BTI guarded bit should
be the guarded bit from the first stage of translation, as there is
no BTI guard information in stage two.  Our code tried to do this,
but got it wrong, because we currently have two fields where the GP
bit information might live (ARMCacheAttrs::guarded and
CPUTLBEntryFull::extra::arm::guarded), and we were storing the GP bit
in the latter during the stage 1 walk but trying to copy the former
in combine_cacheattrs().

Remove the duplicated storage, and always use the field in
CPUTLBEntryFull; correctly propagate the stage 1 value to the output
in get_phys_addr_twostage().

Note for stable backports: in v8.0 and earlier the field is named
result->f.guarded, not result->f.extra.arm.guarded.

Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1950
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20231031173723.26582-1-peter.maydell@linaro.org
2023-11-02 13:36:45 +00:00
..
hvf target/arm/hvf: Clean up local variable shadowing 2023-09-29 10:07:14 +02:00
tcg target/arm: Fix SVE STR increment 2023-11-02 13:36:45 +00:00
arch_dump.c target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
arm-powerctl.c target/arm/arm-powerctl: Correctly init CPUs when powered on to lower EL 2023-10-19 14:32:13 +01:00
arm-powerctl.h
arm-qmp-cmds.c target/arm: Implement FEAT_PACQARMA3 2023-09-08 12:50:44 +01:00
common-semi-target.h target/arm/common-semi-target.h: Remove unnecessary boot.h include 2023-10-19 14:32:13 +01:00
cortex-regs.c target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing 2023-05-18 11:39:33 +01:00
cpregs.h target/arm: Apply access checks to neoverse-n1 special registers 2023-08-31 09:45:15 +01:00
cpu64.c target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
cpu-features.h linux-user/elfload: Add missing arm64 hwcap values 2023-11-02 12:52:06 +00:00
cpu-param.h target/arm: Replace TARGET_PAGE_ENTRY_EXTRA 2023-10-03 08:01:02 -07:00
cpu-qom.h hw/arm/exynos4210: Get arm_boot_info declaration from 'hw/arm/boot.h' 2023-10-19 13:01:52 +01:00
cpu.c target/arm: Enable FEAT_MOPS insns in user-mode emulation 2023-11-02 13:36:45 +00:00
cpu.h target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
debug_helper.c target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
gdbstub64.c target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check 2023-05-12 16:01:25 +01:00
gdbstub.c target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
helper.c target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
helper.h target/arm: Implement FEAT_TIDCP1 2023-09-08 16:41:35 +01:00
hvf_arm.h hvf: add guest debugging handlers for Apple Silicon hosts 2023-06-06 10:19:30 +01:00
hyp_gdbstub.c arm: move KVM breakpoints helpers 2023-06-06 10:19:29 +01:00
idau.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
internals.h target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk 2023-11-02 13:36:45 +00:00
Kconfig target/arm: Explain why we need to select ARM_V7M 2023-05-30 15:50:17 +01:00
kvm64.c target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
kvm_arm.h hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpers 2023-06-28 14:27:59 +02:00
kvm-consts.h target/arm: Remove KVM AArch32 CPU definitions 2023-04-20 10:21:15 +01:00
kvm-stub.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
kvm.c arm/kvm: convert to kvm_get_one_reg 2023-10-19 14:32:13 +01:00
machine.c target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
meson.build meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
op_addsub.h
ptw.c target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk 2023-11-02 13:36:45 +00:00
syndrome.h target/arm: Define syndrome function for MOPS exceptions 2023-09-21 16:07:14 +01:00
tcg-stubs.c target/arm: Move hflags code into the tcg directory 2023-02-27 13:27:04 +00:00
trace-events target/arm/helper: Implement CNTHCTL_EL2.CNT[VP]MASK 2023-08-22 17:31:13 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
vfp_helper.c target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00