qemu/target-ppc
j_mayer 36f696517b As icbi is not a priviledge instruction and is treated as a load by the MMU
it needs to be implemented for every MMU translation mode.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2492 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-18 08:47:10 +00:00
..
cpu.h Make it safe to use 64 bits GPR and/or 64 bits host registers. 2007-03-17 14:02:15 +00:00
exec.h Make it safe to use 64 bits GPR and/or 64 bits host registers. 2007-03-17 14:02:15 +00:00
helper.c Make it safe to use 64 bits GPR and/or 64 bits host registers. 2007-03-17 14:02:15 +00:00
mfrom_table_gen.c Great PowerPC emulation code resynchronisation and improvments: 2007-03-07 08:32:30 +00:00
mfrom_table.c Great PowerPC emulation code resynchronisation and improvments: 2007-03-07 08:32:30 +00:00
op_helper_mem.h As icbi is not a priviledge instruction and is treated as a load by the MMU 2007-03-18 08:47:10 +00:00
op_helper.c As icbi is not a priviledge instruction and is treated as a load by the MMU 2007-03-18 08:47:10 +00:00
op_helper.h As icbi is not a priviledge instruction and is treated as a load by the MMU 2007-03-18 08:47:10 +00:00
op_mem.h As icbi is not a priviledge instruction and is treated as a load by the MMU 2007-03-18 08:47:10 +00:00
op_template.h Great PowerPC emulation code resynchronisation and improvments: 2007-03-07 08:32:30 +00:00
op.c As icbi is not a priviledge instruction and is treated as a load by the MMU 2007-03-18 08:47:10 +00:00
STATUS Great PowerPC emulation code resynchronisation and improvments: 2007-03-07 08:32:30 +00:00
translate_init.c Great PowerPC emulation code resynchronisation and improvments: 2007-03-07 08:32:30 +00:00
translate.c As icbi is not a priviledge instruction and is treated as a load by the MMU 2007-03-18 08:47:10 +00:00