qemu/target
David Hildenbrand dce0a58fd6 s390x/tcg: Implement XxC and checks for most FP instructions
With the floating-point extension facility
- CONVERT FROM LOGICAL
- CONVERT TO LOGICAL
- CONVERT TO FIXED
- CONVERT FROM FIXED
- LOAD FP INTEGER
have both, a rounding mode specification and the inexact-exception control
(XxC). Other instructions will be handled separatly.

Check for valid rounding modes and forward also the XxC (via m4). To avoid
a lot of boilerplate code and changes to the helpers, combine both, the
m3 and m4 field in a combined 32 bit TCG variable. Perform checks at
a central place, taking in account if the m3 or m4 field was ignore
before the floating-point extension facility was introduced.

Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20190218122710.23639-13-david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-03-04 11:49:31 +01:00
..
alpha
arm target/arm: Enable ARMv8.2-FHM for -cpu max 2019-02-28 11:03:05 +00:00
cris
hppa target/hppa: fix dcor instruction 2019-02-12 08:59:21 -08:00
i386 qapi: make query-cpu-definitions depend on specific targets 2019-02-18 14:44:05 +01:00
lm32
m68k
microblaze
mips target/mips: Preparing for adding MMI instructions 2019-02-27 14:26:14 +01:00
moxie target/moxie: Fix LGPL information in the file headers 2019-02-06 15:46:11 +01:00
nios2
openrisc
ppc target/ppc: Basic POWER9 bare-metal radix MMU support 2019-02-26 09:21:25 +11:00
riscv target/riscv: fix counter-enable checks in ctr() 2019-02-11 15:56:22 -08:00
s390x s390x/tcg: Implement XxC and checks for most FP instructions 2019-03-04 11:49:31 +01:00
sh4
sparc
tilegx
tricore
unicore32
xtensa target/xtensa: implement PREFCTL SR 2019-02-28 04:43:22 -08:00