Richard Henderson 598aa1160c

target/riscv: Split gen_arith_imm into functional and temp ...

The tcg_gen_fooi_tl functions have some immediate constant
folding built in, which match up with some of the riscv asm
builtin macros, like mv and not.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>

2019-05-24 12:09:23 -07:00

..

trans_privileged.inc.c

RISC-V: fix single stepping over ret and other branching instructions

2019-05-24 12:09:22 -07:00

trans_rva.inc.c

…

trans_rvd.inc.c

target/riscv: Convert RV64D insns to decodetree

2019-03-13 10:34:06 +01:00

trans_rvf.inc.c

…

trans_rvi.inc.c

target/riscv: Split gen_arith_imm into functional and temp

2019-05-24 12:09:23 -07:00

trans_rvm.inc.c

target/riscv: Zero extend the inputs of divuw and remuw

2019-03-22 00:26:39 -07:00