Richard Henderson dc03246cc3 target-*: Drop cpu_gen_code define ...

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Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>

2015-10-07 20:36:50 +11:00

..

cpu.c

target-tilegx: Generate SEGV properly

2015-09-15 07:45:28 -07:00

cpu.h

target-*: Drop cpu_gen_code define

2015-10-07 20:36:50 +11:00

helper.c

target-tilegx: Handle most bit manipulation instructions

2015-09-15 07:45:33 -07:00

helper.h

target-tilegx: Handle v1shl, v1shru, v1shrs

2015-09-15 07:45:34 -07:00

Makefile.objs

target-tilegx: Handle v1shl, v1shru, v1shrs

2015-09-15 07:45:34 -07:00

opcode_tilegx.h

…

simd_helper.c

target-tilegx: Handle v1shl, v1shru, v1shrs

2015-09-15 07:45:34 -07:00

spr_def_64.h

…

translate.c

target-*: Increment num_insns immediately after tcg_gen_insn_start

2015-10-07 20:36:27 +11:00