qemu/target
Richard Henderson da4f7b8561 target-arm queue:
* hw/char/bcm2835_aux: Fix assert when receive FIFO fills up
  * hw/arm/smmuv3: Assert input to oas2bits() is valid
  * target/arm/kvm: Set PMU for host only when available
  * target/arm/kvm: Do not silently remove PMU
  * hvf: arm: Properly disable PMU
  * hvf: arm: Do not advance PC when raising an exception
  * hw/misc/bcm2835_property: several minor bugfixes
  * target/arm: Don't assert for 128-bit tile accesses when SVL is 128
  * target/arm: Fix UMOPA/UMOPS of 16-bit values
  * target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled
  * system/physmem: Where we assume we have a RAM MR, assert it
  * sh4, i386, m68k, xtensa, tricore, arm: fix minor Coverity issues
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Merge tag 'pull-target-arm-20240730' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * hw/char/bcm2835_aux: Fix assert when receive FIFO fills up
 * hw/arm/smmuv3: Assert input to oas2bits() is valid
 * target/arm/kvm: Set PMU for host only when available
 * target/arm/kvm: Do not silently remove PMU
 * hvf: arm: Properly disable PMU
 * hvf: arm: Do not advance PC when raising an exception
 * hw/misc/bcm2835_property: several minor bugfixes
 * target/arm: Don't assert for 128-bit tile accesses when SVL is 128
 * target/arm: Fix UMOPA/UMOPS of 16-bit values
 * target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled
 * system/physmem: Where we assume we have a RAM MR, assert it
 * sh4, i386, m68k, xtensa, tricore, arm: fix minor Coverity issues

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# gpg: Signature made Tue 30 Jul 2024 07:39:12 PM AEST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]

* tag 'pull-target-arm-20240730' of https://git.linaro.org/people/pmaydell/qemu-arm: (21 commits)
  system/physmem: Where we assume we have a RAM MR, assert it
  target/sh4: Avoid shift into sign bit in update_itlb_use()
  target/i386: Remove dead assignment to ss in do_interrupt64()
  target/m68k: avoid shift into sign bit in dump_address_map()
  target/xtensa: Make use of 'segment' in pptlb helper less confusing
  target/tricore: Use unsigned types for bitops in helper_eq_b()
  target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled
  target/arm: Avoid shifts by -1 in tszimm_shr() and tszimm_shl()
  target/arm: Fix UMOPA/UMOPS of 16-bit values
  target/arm: Don't assert for 128-bit tile accesses when SVL is 128
  hw/misc/bcm2835_property: Reduce scope of variables in mbox push function
  hw/misc/bcm2835_property: Restrict scope of start_num, number, otp_row
  hw/misc/bcm2835_property: Avoid overflow in OTP access properties
  hw/misc/bcm2835_property: Fix handling of FRAMEBUFFER_SET_PALETTE
  hvf: arm: Do not advance PC when raising an exception
  hvf: arm: Properly disable PMU
  hvf: arm: Raise an exception for sysreg by default
  target/arm/kvm: Do not silently remove PMU
  target/arm/kvm: Set PMU for host only when available
  hw/arm/smmuv3: Assert input to oas2bits() is valid
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-30 22:25:37 +10:00
..
alpha target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
arm target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled 2024-07-29 16:56:46 +01:00
avr target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
cris target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
hexagon target/hexagon/imported/mmvec: Fix superfluous trailing semicolon 2024-07-17 14:04:15 +03:00
hppa target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
i386 target/i386: Remove dead assignment to ss in do_interrupt64() 2024-07-29 16:59:44 +01:00
loongarch target/loongarch: Fix helper_lddir() a CID INTEGER_OVERFLOW issue 2024-07-24 16:52:18 +08:00
m68k target/m68k: avoid shift into sign bit in dump_address_map() 2024-07-29 16:58:58 +01:00
microblaze target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
mips target/mips: Restrict semihosting to TCG 2024-07-22 09:38:10 +01:00
openrisc target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
ppc target/ppc: Remove includes from mmu-book3s-v3.h 2024-07-26 09:51:34 +10:00
riscv accel/tcg: Export set/clear_helper_retaddr 2024-07-23 15:19:39 +10:00
rx target/rx: Use target_ulong for address in LI 2024-07-28 14:13:05 +10:00
s390x target/s390x: move @deprecated-props to CpuModelExpansion Info 2024-07-29 21:47:16 +02:00
sh4 target/sh4: Avoid shift into sign bit in update_itlb_use() 2024-07-29 17:00:20 +01:00
sparc sparc/ldst_helper: make range overlap check more readable 2024-07-23 20:30:36 +02:00
tricore target/tricore: Use unsigned types for bitops in helper_eq_b() 2024-07-29 16:57:27 +01:00
xtensa target/xtensa: Make use of 'segment' in pptlb helper less confusing 2024-07-29 16:58:14 +01:00
Kconfig meson: make target endianneess available to Kconfig 2024-05-03 15:47:47 +02:00
meson.build exec: Expose 'target_page.h' API to user emulation 2024-04-26 15:28:11 +02:00