Madhavan Srinivasan 7624789234 target-ppc/fpu_helper: fix FPSCR_FX bit shift operation ...

Currently in TCG mode, updating floating exception
summary bit (FPSCR_FX) in fpscr also updates
the upper 32bits of fpscr with all 1s.
Modify the bit shift operation statement to use
1ULL instead.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

2015-11-30 19:39:01 +11:00

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arch_dump.c

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cpu-models.c

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cpu-models.h

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cpu-qom.h

monitor/target-ppc: Define target_get_monitor_def

2015-11-12 14:53:36 +11:00

cpu.h

target-ppc: Move the FPSCR bit update macros to cpu.h

2015-11-30 19:39:01 +11:00

dfp_helper.c

target-ppc: Move the FPSCR bit update macros to cpu.h

2015-11-30 19:39:01 +11:00

excp_helper.c

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fpu_helper.c

target-ppc/fpu_helper: fix FPSCR_FX bit shift operation

2015-11-30 19:39:01 +11:00

gdbstub.c

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helper_regs.h

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helper.h

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int_helper.c

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kvm_ppc.h

ppc: Let kvmppc_reset_htab() return 0 for !CONFIG_KVM

2015-11-11 13:29:04 +11:00

kvm-stub.c

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kvm.c

ppc/spapr: Add "ibm,pa-features" property to the device-tree

2015-10-23 12:22:40 +11:00

machine.c

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Makefile.objs

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mem_helper.c

PPC: Fix lswx bounds checks

2015-11-12 13:15:54 +11:00

mfrom_table_gen.c

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mfrom_table.c

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misc_helper.c

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mmu_helper.c

ppc: Add/Re-introduce MMU model definitions needed by PR KVM

2015-11-11 11:05:30 +11:00

mmu-hash32.c

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mmu-hash32.h

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mmu-hash64.c

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mmu-hash64.h

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monitor.c

monitor/target-ppc: Define target_get_monitor_def

2015-11-12 14:53:36 +11:00

STATUS

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timebase_helper.c

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translate_init.c

taget-ppc: Fix read access to IBAT registers higher than IBAT3

2015-11-06 15:42:38 +03:00

translate.c

PPC: Allow Rc bit to be set on mtspr

2015-11-12 13:15:54 +11:00

user_only_helper.c

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