Suraj Jitindar Singh d801a61e98 target/ppc/debug: Print LPCR register value if register exists ... It can be useful when debugging to print the LPCR value. Thus we add the LPCR to the "info registers" output if the register had been defined. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>		2017-02-02 09:30:06 +11:00
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alpha	migration: extend VMStateInfo	2017-01-24 17:54:47 +00:00
arm	armv7m: R14 should reset to 0xffffffff	2017-01-27 15:29:08 +00:00
cris	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
hppa	target-hppa: Implement floating-point insns	2017-01-23 09:52:40 -08:00
i386	pc: Enable vmware-cpuid-freq CPU option for 2.9+ machine types	2017-01-27 18:07:58 +01:00
lm32	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
m68k	This is the same as the v3 posted except a re-base and a few extra signoffs	2017-01-16 18:23:02 +00:00
microblaze	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
mips	migration: extend VMStateInfo	2017-01-24 17:54:47 +00:00
moxie	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
nios2	nios2: Add architecture emulation support	2017-01-24 13:10:35 -08:00
openrisc	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
ppc	target/ppc/debug: Print LPCR register value if register exists	2017-02-02 09:30:06 +11:00
s390x	s390x/kvm: fix cmma reset for KVM	2017-01-24 15:47:31 +01:00
sh4	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
sparc	migration: extend VMStateInfo	2017-01-24 17:54:47 +00:00
tilegx	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
tricore	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
unicore32	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
xtensa	target/xtensa updates:	2017-01-25 16:36:57 +00:00