qemu/target
Igor Mammedov d7caf13b5f x86: cpu: fixup number of addressable IDs for logical processors sharing cache
When QEMU is started with '-cpu host,host-cache-info=on', it will
passthrough host's number of logical processors sharing cache and
number of processor cores in the physical package. QEMU already
fixes up the later to correctly reflect number of configured cores
for VM, however number of logical processors sharing cache is still
comes from host CPU, which confuses guest started with:

       -machine q35,accel=kvm \
       -cpu host,host-cache-info=on,l3-cache=off \
       -smp 20,sockets=2,dies=1,cores=10,threads=1  \
       -numa node,nodeid=0,memdev=ram-node0 \
       -numa node,nodeid=1,memdev=ram-node1 \
       -numa cpu,socket-id=0,node-id=0 \
       -numa cpu,socket-id=1,node-id=1

on 2 socket Xeon 4210R host with 10 cores per socket
with CPUID[04H]:
      ...
        --- cache 3 ---
      cache type                           = unified cache (3)
      cache level                          = 0x3 (3)
      self-initializing cache level        = true
      fully associative cache              = false
      maximum IDs for CPUs sharing cache   = 0x1f (31)
      maximum IDs for cores in pkg         = 0xf (15)
      ...
that doesn't match number of logical processors VM was
configured with and as result RHEL 9.0 guest complains:

   sched: CPU #10's llc-sibling CPU #0 is not on the same node! [node: 1 != 0]. Ignoring dependency.
   WARNING: CPU: 10 PID: 0 at arch/x86/kernel/smpboot.c:421 topology_sane.isra.0+0x67/0x80
   ...
   Call Trace:
     set_cpu_sibling_map+0x176/0x590
     start_secondary+0x5b/0x150
     secondary_startup_64_no_verify+0xc2/0xcb

Fix it by capping max number of logical processors to vcpus/socket
as it was configured, which fixes the issue.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=2088311
Message-Id: <20220524151020.2541698-3-imammedo@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-06-06 09:26:54 +02:00
..
alpha Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
arm target/arm: Remove aa64_sve check from before disas_sve 2022-05-30 17:05:12 +01:00
avr Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
cris Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
hexagon Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
hppa Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
i386 x86: cpu: fixup number of addressable IDs for logical processors sharing cache 2022-06-06 09:26:54 +02:00
m68k target/m68k: Mark helper_raise_exception as noreturn 2022-06-02 09:35:03 +02:00
microblaze Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
mips Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
nios2 Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
openrisc OpenRISC Fixes for 7.0 2022-05-15 16:56:27 -07:00
ppc target/ppc: Implemented [pm]xvbf16ger2* 2022-05-26 17:11:33 -03:00
riscv target/riscv: add zicsr/zifencei to isa_string 2022-05-24 10:38:50 +10:00
rx Fix usp/isp swapping upon clrpsw/setpsw. 2022-04-21 16:45:41 -07:00
s390x target/s390x: kvm: Honor storage keys during emulation 2022-06-03 08:03:28 +02:00
sh4 Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
sparc Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
tricore Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
xtensa Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00