qemu/target
Peter Maydell 4c09abeae8 target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk
In a two-stage translation, the result of the BTI guarded bit should
be the guarded bit from the first stage of translation, as there is
no BTI guard information in stage two.  Our code tried to do this,
but got it wrong, because we currently have two fields where the GP
bit information might live (ARMCacheAttrs::guarded and
CPUTLBEntryFull::extra::arm::guarded), and we were storing the GP bit
in the latter during the stage 1 walk but trying to copy the former
in combine_cacheattrs().

Remove the duplicated storage, and always use the field in
CPUTLBEntryFull; correctly propagate the stage 1 value to the output
in get_phys_addr_twostage().

Note for stable backports: in v8.0 and earlier the field is named
result->f.guarded, not result->f.extra.arm.guarded.

Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1950
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20231031173723.26582-1-peter.maydell@linaro.org
2023-11-02 13:36:45 +00:00
..
alpha meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
arm target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk 2023-11-02 13:36:45 +00:00
avr meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
cris meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
hexagon target/hexagon: fix some occurrences of -Wshadow=local 2023-10-18 16:56:17 -07:00
hppa meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
i386 kvm: i8254: require KVM_CAP_PIT2 and KVM_CAP_PIT_STATE2 2023-10-25 19:53:38 +02:00
loongarch target/loongarch: Add preldx instruction 2023-10-13 09:50:16 +08:00
m68k target/m68k: Use tcg_gen_ext_i32 2023-10-22 16:43:52 -07:00
microblaze meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
mips hw/misc/mips_itu: Declare itc_reconfigure() in 'hw/misc/mips_itu.h' 2023-10-19 23:13:27 +02:00
nios2 meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
openrisc meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
ppc target/ppc: Remove references to gdb_has_xml 2023-10-11 08:46:33 +01:00
riscv kvm: require KVM_IRQFD for kernel irqchip 2023-10-25 17:35:15 +02:00
rx target/rx: Use tcg_gen_ext_i32 2023-10-22 16:43:53 -07:00
s390x target/s390x/kvm: Simplify the GPRs, ACRs, CRs and prefix synchronization code 2023-10-20 07:16:53 +02:00
sh4 target/sh4: Disable decode_gusa when plugins enabled 2023-10-11 08:46:36 +01:00
sparc target/sparc: Remove disas_sparc_legacy 2023-10-25 01:01:13 -07:00
tricore target/tricore: Use tcg_gen_*extract_tl 2023-10-22 16:44:42 -07:00
xtensa target/xtensa: Use tcg_gen_sextract_i32 2023-10-22 16:44:49 -07:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00