4c7f4f4f05
RISC-V also needs to use the same code to create fw_cfg in DSDT. So, avoid code duplication by moving the code in arm and riscv to a device specific file. Suggested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20231218150247.466427-2-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
24 lines
757 B
C
24 lines
757 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Add fw_cfg device in DSDT
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*
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*/
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#include "hw/nvram/fw_cfg_acpi.h"
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#include "hw/acpi/aml-build.h"
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void fw_cfg_acpi_dsdt_add(Aml *scope, const MemMapEntry *fw_cfg_memmap)
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{
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Aml *dev = aml_device("FWCF");
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aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002")));
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/* device present, functioning, decoding, not shown in UI */
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aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
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aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
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Aml *crs = aml_resource_template();
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aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base,
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fw_cfg_memmap->size, AML_READ_WRITE));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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}
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