45726b6e2c
The PIIX4 hardware has block transfer buffer always enabled in the hardware, but the i801 does not. Add a parameter to pm_smbus_init to force on the block transfer so the PIIX4 handler can enable this by default, as it was disabled by default before. Signed-off-by: Corey Minyard <cminyard@mvista.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1534796770-10295-9-git-send-email-minyard@acm.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
39 lines
869 B
C
39 lines
869 B
C
#ifndef PM_SMBUS_H
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#define PM_SMBUS_H
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#define PM_SMBUS_MAX_MSG_SIZE 32
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typedef struct PMSMBus {
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I2CBus *smbus;
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MemoryRegion io;
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uint8_t smb_stat;
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uint8_t smb_ctl;
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uint8_t smb_cmd;
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uint8_t smb_addr;
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uint8_t smb_data0;
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uint8_t smb_data1;
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uint8_t smb_data[PM_SMBUS_MAX_MSG_SIZE];
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uint8_t smb_blkdata;
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uint8_t smb_auxctl;
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uint32_t smb_index;
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/* Set by pm_smbus.c */
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void (*reset)(struct PMSMBus *s);
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/* Set by the user. */
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bool i2c_enable;
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void (*set_irq)(struct PMSMBus *s, bool enabled);
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void *opaque;
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/* Internally used by pm_smbus. */
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/* Set on block transfers after the last byte has been read, so the
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INTR bit can be set at the right time. */
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bool op_done;
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} PMSMBus;
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void pm_smbus_init(DeviceState *parent, PMSMBus *smb, bool force_aux_blk);
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#endif /* PM_SMBUS_H */
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