qemu/target-arm
Ian Campbell d615efac7c target-arm: Correct handling of UXN bit in ARMv8 LPAE page tables
In v8 page tables bit 54 in the PTE is UXN in the EL0/EL1 translation regimes
and XN elsewhere. In v7 the bit is always XN. Since we only emulate EL0/EL1 we
can just treat this bit as UXN whenever we are in v8 mode.

Also correctly extract the upper attributes from the PTE entry, the v8 version
tried to avoid extracting the CONTIG bit and ended up with the upper bits being
off-by-one. Instead behave the same as v7 and extract (but ignore) the CONTIG
bit.

This fixes "Bad mode in Synchronous Abort handler detected, code 0x8400000f"
seen when modprobing modules under Linux.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Claudio Fontana <claudio.fontana@huawei.com>
Cc: Rob Herring <robherring2@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-09 16:06:11 +01:00
..
arm_ldst.h softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
arm-semi.c cpu: Move opaque field from CPU_COMMON to CPUState 2014-03-13 19:20:47 +01:00
cpu64.c target-arm/cpu64.c: Actually register Cortex-A57 impdef registers 2014-06-09 15:43:22 +01:00
cpu-qom.h target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32 2014-04-17 21:34:06 +01:00
cpu.c target-arm: Fix segfault on startup when KVM enabled 2014-05-27 13:55:39 +01:00
cpu.h target-arm: move arm_*_code to a separate file 2014-06-05 16:10:33 +02:00
crypto_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
gdbstub64.c target-arm/gdbstub64.c: remove useless 'break' statement. 2014-04-17 21:34:06 +01:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
helper-a64.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
helper-a64.h target-arm: A64: Implement FCVTXN 2014-03-17 16:31:53 +00:00
helper.c target-arm: Correct handling of UXN bit in ARMv8 LPAE page tables 2014-06-09 16:06:11 +01:00
helper.h tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
internals.h target-arm: A64: Generalize update_spsel for the various ELs 2014-05-27 17:09:54 +01:00
iwmmxt_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
kvm32.c kvm: reset state from the CPU's reset method 2014-05-13 13:12:40 +02:00
kvm64.c target-arm: Make elr_el1 an array 2014-05-27 17:09:51 +01:00
kvm_arm.h kvm: reset state from the CPU's reset method 2014-05-13 13:12:40 +02:00
kvm-consts.h target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs 2014-02-20 10:35:50 +00:00
kvm-stub.c target-arm: Initialize cpreg list from KVM when using KVM 2013-06-25 18:16:10 +01:00
kvm.c arm: vgic device control api support 2014-02-26 17:20:00 +00:00
machine.c target-arm: Add SPSR entries for EL2/HYP and EL3/MON 2014-05-27 17:09:52 +01:00
Makefile.objs target-arm: A64: add stubs for a64 specific helpers 2013-12-17 19:42:32 +00:00
neon_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
translate-a64.c target-arm: move arm_*_code to a separate file 2014-06-05 16:10:33 +02:00
translate.c target-arm: move arm_*_code to a separate file 2014-06-05 16:10:33 +02:00
translate.h target-arm: Use a 1:1 mapping between EL and MMU index 2014-05-27 17:09:51 +01:00