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qemu/hw/intc
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Peter Maydell c20a135a7a hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts work 
In gicv3_init_cpuif() we copy the ARMCPU gicv3_maintenance_interrupt
into the GICv3CPUState struct's maintenance_irq field.  This will
only work if the board happens to have already wired up the CPU
maintenance IRQ before the GIC was realized.  Unfortunately this is
not the case for the 'virt' board, and so the value that gets copied
is NULL (since a qemu_irq is really a pointer to an IRQState struct
under the hood).  The effect is that the CPU interface code never
actually raises the maintenance interrupt line.

Instead, since the GICv3CPUState has a pointer to the CPUState, make
the dereference at the point where we want to raise the interrupt, to
avoid an implicit requirement on board code to wire things up in a
particular order.

Reported-by: Jose Martins <josemartins90@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20201009153904.28529-1-peter.maydell@linaro.org
Reviewed-by: Luc Michel <luc@lmichel.fr>
2020-11-02 16:52:17 +00:00
..
allwinner-a10-pic.c Clean up inclusion of sysemu/sysemu.h 2019-08-16 13:31:53 +02:00
apic_common.c apic: Report current_count via 'info lapic' 2020-07-10 19:26:55 -04:00
apic.c Use DECLARE_*CHECKER* when possible (--force mode) 2020-09-09 09:27:11 -04:00
arm_gic_common.c arm_gic: Mask the un-supported priority bits 2020-02-28 16:14:57 +00:00
arm_gic_kvm.c Use DECLARE_*CHECKER* when possible (--force mode) 2020-09-09 09:27:11 -04:00
arm_gic.c arm_gic: Mask the un-supported priority bits 2020-02-28 16:14:57 +00:00
arm_gicv2m.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
arm_gicv3_common.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
arm_gicv3_cpuif.c hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts work 2020-11-02 16:52:17 +00:00
arm_gicv3_dist.c hw/intc/arm_gicv3: GICD_TYPER.SecurityExtn is RAZ if GICD_CTLR.DS == 1 2019-06-17 15:13:19 +01:00
arm_gicv3_its_common.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
arm_gicv3_its_kvm.c Use DECLARE_*CHECKER* when possible (--force mode) 2020-09-09 09:27:11 -04:00
arm_gicv3_kvm.c Use DECLARE_*CHECKER* when possible (--force mode) 2020-09-09 09:27:11 -04:00
arm_gicv3_redist.c hw/intc/arm_gicv3: Fix decoding of ID register range 2019-06-17 15:13:19 +01:00
arm_gicv3.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
armv7m_nvic.c hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUs 2020-10-01 15:31:00 +01:00
aspeed_vic.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
bcm2835_ic.c hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlers 2020-10-20 16:12:00 +01:00
bcm2836_control.c hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbers 2020-10-20 16:12:00 +01:00
etraxfs_pic.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
exynos4210_combiner.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
exynos4210_gic.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
gic_internal.h hw/intc/arm_gic: Drop GIC_BASE_IRQ macro 2018-09-25 15:13:24 +01:00
gicv3_internal.h target-arm: Add GICv3CPUState in CPUARMState struct 2017-02-28 17:10:00 +00:00
grlib_irqmp.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
heathrow_pic.c Include hw/hw.h exactly where needed 2019-08-16 13:31:52 +02:00
i8259_common.c isa: Convert uses of isa_create() with Coccinelle 2020-06-15 22:05:28 +02:00
i8259.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
ibex_plic.c hw/intc: ibex_plic: Honour source priorities 2020-08-21 22:37:55 -07:00
imx_avic.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
imx_gpcv2.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
intc.c intc: add an interface to gather statistics/informations on interrupt controllers 2016-10-04 10:00:25 +02:00
ioapic_common.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
ioapic.c KVM: Kick resamplefd for split kernel irqchip 2020-06-10 12:10:33 -04:00
Kconfig hw/riscv: Move sifive_plic model to hw/intc 2020-09-09 15:54:19 -07:00
lm32_pic.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
loongson_liointc.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
meson.build hw/riscv: Move sifive_plic model to hw/intc 2020-09-09 15:54:19 -07:00
mips_gic.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
nios2_iic.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
omap_intc.c omap_intc: Use typedef name for instance_size 2020-09-09 13:20:22 -04:00
ompic.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
openpic_kvm.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
openpic.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
pl190.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
pnv_xive_regs.h ppc/pnv: add a XIVE interrupt controller model for POWER9 2019-03-12 14:33:04 +11:00
pnv_xive.c error: Eliminate error_propagate() with Coccinelle, part 1 2020-07-10 15:18:08 +02:00
puv3_intc.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
realview_gic.c error: Eliminate error_propagate() with Coccinelle, part 1 2020-07-10 15:18:08 +02:00
rx_icu.c qemu/atomic.h: rename atomic_ to qatomic_ 2020-09-23 16:07:44 +01:00
s390_flic_kvm.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
s390_flic.c sysbus: Convert to sysbus_realize() etc. with Coccinelle 2020-06-15 22:05:28 +02:00
sh_intc.c Include hw/hw.h exactly where needed 2019-08-16 13:31:52 +02:00
sifive_clint.c hw/riscv: Move sifive_clint model to hw/intc 2020-09-09 15:54:19 -07:00
sifive_plic.c qemu/atomic.h: rename atomic_ to qatomic_ 2020-09-23 16:07:44 +01:00
slavio_intctl.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
spapr_xive_kvm.c spapr/xive: Allocate vCPU IPIs from the vCPU contexts 2020-09-08 10:08:42 +10:00
spapr_xive.c spapr/xive: Add a 'hv-prio' property to represent the KVM escalation priority 2020-09-08 10:08:42 +10:00
trace-events hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlers 2020-10-20 16:12:00 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
vgic_common.h intc/gic: Extract some reusable vGIC code 2015-09-24 01:29:36 +01:00
xics_kvm.c error: Eliminate error_propagate() with Coccinelle, part 1 2020-07-10 15:18:08 +02:00
xics_pnv.c Clean up inclusion of sysemu/sysemu.h 2019-08-16 13:31:53 +02:00
xics_spapr.c spapr: Pass the maximum number of vCPUs to the KVM interrupt controller 2019-12-17 10:39:48 +11:00
xics.c error: Eliminate error_propagate() with Coccinelle, part 2 2020-07-10 15:18:08 +02:00
xilinx_intc.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
xive.c ppc/xive: Simplify error handling in xive_tctx_realize() 2020-08-13 21:07:28 +10:00
xlnx-pmu-iomod-intc.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
xlnx-zynqmp-ipi.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00