qemu/tcg/aarch64
Richard Henderson 5826a0dbf0 tcg/aarch64: Emit BTI insns at jump landing pads
The prologue is entered via "call"; the epilogue, each tb,
and each goto_tb continuation point are all reached via "jump".

As tcg_out_goto_long is only used by tcg_out_exit_tb, merge
the two functions.  Change the indirect register used to
TCG_REG_TMP1, aka X17, so that the BTI condition created
is "jump" instead of "jump or call".

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-09-16 14:57:16 +00:00
..
tcg-target-con-set.h tcg/aarch64: Support 128-bit load/store 2023-05-30 09:51:11 -07:00
tcg-target-con-str.h tcg/aarch64: Simplify constraints on qemu_ld/st 2023-05-30 09:51:11 -07:00
tcg-target-reg-bits.h tcg: Split out tcg-target-reg-bits.h 2023-06-05 12:04:28 -07:00
tcg-target.c.inc tcg/aarch64: Emit BTI insns at jump landing pads 2023-09-16 14:57:16 +00:00
tcg-target.h tcg/aarch64: Implement negsetcond_* 2023-08-24 11:22:42 -07:00
tcg-target.opc.h tcg/aarch64: Implement INDEX_op_rotl{i,v}_vec 2020-06-02 08:42:37 -07:00