8676007eff
The Neoverse-V1 TRM is a bit confused about the layout of the ID_AA64ISAR1_EL1 register, and so its table 3-6 has the wrong value for this ID register. Trust instead section 3.2.74's list of which fields are set. This means that we stop incorrectly reporting FEAT_XS as present, and now report the presence of FEAT_BF16. Cc: qemu-stable@nongnu.org Reported-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240917161337.3012188-1-peter.maydell@linaro.org |
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| .. | ||
| a32-uncond.decode | ||
| a32.decode | ||
| a64.decode | ||
| arm_ldst.h | ||
| cpu32.c | ||
| cpu64.c | ||
| cpu-v7m.c | ||
| crypto_helper.c | ||
| gengvec64.c | ||
| gengvec.c | ||
| helper-a64.c | ||
| helper-a64.h | ||
| helper-mve.h | ||
| helper-sme.h | ||
| helper-sve.h | ||
| hflags.c | ||
| iwmmxt_helper.c | ||
| m_helper.c | ||
| m-nocp.decode | ||
| meson.build | ||
| mte_helper.c | ||
| mte_helper.h | ||
| mve_helper.c | ||
| mve.decode | ||
| neon_helper.c | ||
| neon-dp.decode | ||
| neon-ls.decode | ||
| neon-shared.decode | ||
| op_helper.c | ||
| pauth_helper.c | ||
| psci.c | ||
| sme_helper.c | ||
| sme-fa64.decode | ||
| sme.decode | ||
| sve_helper.c | ||
| sve_ldst_internal.h | ||
| sve.decode | ||
| t16.decode | ||
| t32.decode | ||
| tlb_helper.c | ||
| translate-a32.h | ||
| translate-a64.c | ||
| translate-a64.h | ||
| translate-m-nocp.c | ||
| translate-mve.c | ||
| translate-neon.c | ||
| translate-sme.c | ||
| translate-sve.c | ||
| translate-vfp.c | ||
| translate.c | ||
| translate.h | ||
| vec_helper.c | ||
| vec_internal.h | ||
| vfp-uncond.decode | ||
| vfp.decode | ||