Daniel Henrique Barboza d4ea711704 target/riscv: introduce riscv_cpu_cfg() ... We're going to do changes that requires accessing the RISCVCPUConfig struct from the RISCVCPU, having access only to a CPURISCVState 'env' pointer. Add a helper to make the code easier to read. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230222185205.355361-2-dbarboza@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2023-03-01 13:47:08 -08:00
..
insn_trans	target/riscv: fix ctzw behavior	2023-02-07 08:19:23 +10:00
arch_dump.c
bitmanip_helper.c
common-semi-target.h
cpu_bits.h
cpu_helper.c	target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()	2023-02-23 14:21:33 -08:00
cpu_user.h
cpu_vendorid.h	RISC-V: Add initial support for T-Head C906	2023-02-07 08:19:23 +10:00
cpu-param.h
cpu.c	target/riscv: Remove privileged spec version restriction for RVV	2023-02-23 14:21:31 -08:00
cpu.h	target/riscv: introduce riscv_cpu_cfg()	2023-03-01 13:47:08 -08:00
crypto_helper.c
csr.c	target/riscv: Remove privileged spec version restriction for RVV	2023-02-23 14:21:31 -08:00
debug.c
debug.h
fpu_helper.c
gdbstub.c
helper.h	RISC-V: Adding XTheadSync ISA extension	2023-02-07 08:19:23 +10:00
insn16.decode
insn32.decode
instmap.h
internals.h
Kconfig
kvm_riscv.h
kvm-stub.c
kvm.c	target/riscv: fix SBI getchar handler for KVM	2023-02-07 08:19:23 +10:00
m128_helper.c
machine.c
meson.build
monitor.c
op_helper.c	RISC-V: Adding XTheadSync ISA extension	2023-02-07 08:19:23 +10:00
pmp.c	target/riscv: Smepmp: Skip applying default rules when address matches	2023-02-23 14:21:32 -08:00
pmp.h
pmu.c
pmu.h	riscv: Clean up includes	2023-02-08 07:28:05 +01:00
sbi_ecall_interface.h
time_helper.c
time_helper.h
trace-events
trace.h
translate.c	target/riscv: fix for virtual instr exception	2023-02-07 08:19:23 +10:00
vector_helper.c	target/riscv: Fix vslide1up.vf and vslide1down.vf	2023-02-23 14:21:34 -08:00
xthead.decode	RISC-V: Adding XTheadFmv ISA extension	2023-02-07 08:19:23 +10:00
XVentanaCondOps.decode