qemu/include
Peter Maydell ab08440a4e Assorted tlb and tb caching fixes
-----BEGIN PGP SIGNATURE-----
 
 iQEcBAABAgAGBQJbOky7AAoJEGTfOOivfiFfvYEH/iDRoHaTo+HOClIqrHY+yTr9
 39JrMbvRpJ0+TwhzWHvA8Ukuof2DpUFYNpx9F8zIy4HEVG8Pl9VX4ntK121WIOvb
 Cf7/gR4M6PW9TnV1NDe4cWeVVUlg2WuY81vJBFKaIRbh6/m3OnAxL+ZnKYHO7OLs
 mmxXI76kX9wAicOTsObx19Tb1XOlAqyzxdVb8HrrEK488iigVuJ3W1l+pQEEZMdF
 CICXVglTBCACnBZ1nG7vCY0UVkf4c8rOM+c8f+4ktkYl2GcNgkWLMjbVYf3rsozH
 5iUfCBqNbRQ5xZBVTSD/efTLbxQ7wCMCwfDmwvy/71Pi/vwxaIHEtdWxCofv0p8=
 =XQ94
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180702' into staging

Assorted tlb and tb caching fixes

# gpg: Signature made Mon 02 Jul 2018 17:03:07 BST
# gpg:                using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20180702:
  cpu: Assert asidx_from_attrs return value in range
  accel/tcg: Avoid caching overwritten tlb entries
  accel/tcg: Don't treat invalid TLB entries as needing recheck
  accel/tcg: Correct "is this a TLB miss" check in get_page_addr_code()
  tcg: Define and use new tlb_hit() and tlb_hit_page() functions
  translate-all: fix locking of TBs whose two pages share the same physical page

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-02 17:57:46 +01:00
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